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Split RISC-V targets into 32/64-bit

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This commit is contained in:
Yannis Huber
2020-06-01 16:39:05 +02:00
committed by Ron Evans
parent 875d36cba0
commit 34e0961a79
7 changed files with 20 additions and 71 deletions
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targets/fe310.json
+1 -15
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@@ -1,19 +1,5 @@
{
"inherits": ["riscv32"],
"features": ["+a", "+c", "+m"],
"build-tags": ["fe310", "sifive"],
"llvm-target": "riscv32--none",
"cflags": [
"--target=riscv32--none",
"-march=rv32imac",
"-mabi=ilp32",
"-Os",
"-Werror",
"-fno-exceptions", "-fno-unwind-tables",
"-ffunction-sections", "-fdata-sections"
],
"ldflags": [
"-melf32lriscv",
"--gc-sections"
]
"build-tags": ["fe310", "sifive"]
}