Make the frequency selection more flexible on stm32f103

This commit is contained in:
jaap aarts
2021-11-05 12:57:53 +01:00
committed by Ron Evans
parent 03383760d6
commit 30bbdd5aeb
+9 -10
View File
@@ -339,24 +339,23 @@ func (spi SPI) getBaudRate(config SPIConfig) uint32 {
var conf uint32 var conf uint32
// set frequency dependent on PCLK2 prescaler (div 1) // set frequency dependent on PCLK2 prescaler (div 1)
switch config.Frequency { switch {
case 125000: case config.Frequency < 125000:
// Note: impossible to achieve lower frequency with current PCLK2! // Note: impossible to achieve lower frequency with current PCLK2!
conf |= stm32.SPI_CR1_BR_Div256 conf |= stm32.SPI_CR1_BR_Div256
case 250000: case config.Frequency < 250000:
conf |= stm32.SPI_CR1_BR_Div256 conf |= stm32.SPI_CR1_BR_Div256
case 500000: case config.Frequency < 500000:
conf |= stm32.SPI_CR1_BR_Div128 conf |= stm32.SPI_CR1_BR_Div128
case 1000000: case config.Frequency < 1000000:
conf |= stm32.SPI_CR1_BR_Div64 conf |= stm32.SPI_CR1_BR_Div64
case 2000000: case config.Frequency < 2000000:
conf |= stm32.SPI_CR1_BR_Div32 conf |= stm32.SPI_CR1_BR_Div32
case 4000000: case config.Frequency < 4000000:
conf |= stm32.SPI_CR1_BR_Div16 conf |= stm32.SPI_CR1_BR_Div16
case 8000000:
conf |= stm32.SPI_CR1_BR_Div8
default: default:
conf |= stm32.SPI_CR1_BR_Div256 // When its bigger than Div16, just round to the maximum frequency.
conf |= stm32.SPI_CR1_BR_Div8
} }
return conf << stm32.SPI_CR1_BR_Pos return conf << stm32.SPI_CR1_BR_Pos
} }