risc-v: add support for 64-bit RISC-V CPUs

targets/fe310.json

@@ -1,5 +1,5 @@
 {
-	"inherits": ["riscv"],
+	"inherits": ["riscv32"],
 	"features": ["+a", "+c", "+m"],
 	"build-tags": ["fe310", "sifive"]
 }

targets/riscv-qemu.json

@@ -1,5 +1,5 @@
 {
-	"inherits": ["riscv"],
+	"inherits": ["riscv32"],
 	"features": ["+a", "+c", "+m"],
 	"build-tags": ["virt", "qemu"],
 	"linkerscript": "targets/riscv-qemu.ld",

targets/riscv.json

@@ -1,5 +1,4 @@
 {
-	"llvm-target": "riscv32--none",
 	"goos": "linux",
 	"goarch": "arm",
 	"build-tags": ["tinygo.riscv", "baremetal", "linux", "arm"],
@@ -9,16 +8,12 @@
 	"rtlib": "compiler-rt",
 	"libc": "picolibc",
 	"cflags": [
-		"--target=riscv32--none",
-		"-march=rv32imac",
-		"-mabi=ilp32",
 		"-Os",
 		"-Werror",
 		"-fno-exceptions", "-fno-unwind-tables",
 		"-ffunction-sections", "-fdata-sections"
 	],
 	"ldflags": [
-		"-melf32lriscv",
 		"--gc-sections"
 	],
 	"extra-files": [

targets/riscv32.json

@@ -0,0 +1,12 @@
+{
+	"inherits": ["riscv"],
+	"llvm-target": "riscv32--none",
+	"cflags": [
+		"--target=riscv32--none",
+		"-march=rv32imac",
+		"-mabi=ilp32"
+	],
+	"ldflags": [
+		"-melf32lriscv"
+	]
+}

targets/riscv64.json

@@ -0,0 +1,13 @@
+{
+	"inherits": ["riscv"],
+	"llvm-target": "riscv64--none",
+	"build-tags": ["tinygo.riscv64"],
+	"cflags": [
+		"--target=riscv64--none",
+		"-march=rv64gc",
+		"-mabi=lp64"
+	],
+	"ldflags": [
+		"-melf64lriscv"
+	]
+}