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risc-v: add support for 64-bit RISC-V CPUs

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This commit is contained in:
Yannis Huber
2020-06-08 16:47:39 +02:00
committed by GitHub
parent d61d5d7ab1
commit 2396c22658
8 changed files with 100 additions and 8 deletions
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src/runtime/volatile/volatile.go
+6
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@@ -24,6 +24,9 @@ func LoadUint16(addr *uint16) (val uint16)
// LoadUint32 loads the volatile value *addr.
func LoadUint32(addr *uint32) (val uint32)
// LoadUint64 loads the volatile value *addr.
func LoadUint64(addr *uint64) (val uint64)
// StoreUint8 stores val to the volatile value *addr.
func StoreUint8(addr *uint8, val uint8)
@@ -32,3 +35,6 @@ func StoreUint16(addr *uint16, val uint16)
// StoreUint32 stores val to the volatile value *addr.
func StoreUint32(addr *uint32, val uint32)
// StoreUint64 stores val to the volatile value *addr.
func StoreUint64(addr *uint64, val uint64)