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Code Issues Packages Projects Releases 6 Wiki Activity

machine: replace hard-coded cpu frequencies on rp2xxx (#4767)

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Missed from the earlier change that bumped the rp2350 frequency.
This commit is contained in:
Elias Naur
2025-03-02 12:38:29 +01:00
committed by GitHub
parent 64d8a04308
commit 20fc814635
3 changed files with 11 additions and 11 deletions
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src/machine/machine_rp2_clocks.go
+7 -7
View File
@@ -144,7 +144,7 @@ var pllsysFB, pllsysPD1, pllsysPD2 uint32
// Note that the entire init function is computed at compile time // Note that the entire init function is computed at compile time
// by interp. // by interp.
func init() { func init() {
fb, _, pd1, pd2, err := pllSearch{LockRefDiv: 1}.CalcDivs(xoscFreq*MHz, uint64(CPUFrequency()), MHz) fb, _, pd1, pd2, err := pllSearch{LockRefDiv: 1}.CalcDivs(xoscFreq*MHz, cpuFreq, MHz)
if err != nil { if err != nil {
panic(err) panic(err)
} }
@@ -185,15 +185,15 @@ func (clks *clocksType) init() {
cref := clks.clock(clkRef) cref := clks.clock(clkRef)
cref.configure(rp.CLOCKS_CLK_REF_CTRL_SRC_XOSC_CLKSRC, cref.configure(rp.CLOCKS_CLK_REF_CTRL_SRC_XOSC_CLKSRC,
0, // No aux mux 0, // No aux mux
12*MHz, xoscFreq,
12*MHz) xoscFreq)
// clkSys = pllSys (125MHz) / 1 = 125MHz // clkSys = pllSys (125MHz) / 1 = 125MHz
csys := clks.clock(clkSys) csys := clks.clock(clkSys)
csys.configure(rp.CLOCKS_CLK_SYS_CTRL_SRC_CLKSRC_CLK_SYS_AUX, csys.configure(rp.CLOCKS_CLK_SYS_CTRL_SRC_CLKSRC_CLK_SYS_AUX,
rp.CLOCKS_CLK_SYS_CTRL_AUXSRC_CLKSRC_PLL_SYS, rp.CLOCKS_CLK_SYS_CTRL_AUXSRC_CLKSRC_PLL_SYS,
125*MHz, cpuFreq,
125*MHz) cpuFreq)
// clkUSB = pllUSB (48MHz) / 1 = 48MHz // clkUSB = pllUSB (48MHz) / 1 = 48MHz
cusb := clks.clock(clkUSB) cusb := clks.clock(clkUSB)
@@ -217,8 +217,8 @@ func (clks *clocksType) init() {
cperi := clks.clock(clkPeri) cperi := clks.clock(clkPeri)
cperi.configure(0, cperi.configure(0,
rp.CLOCKS_CLK_PERI_CTRL_AUXSRC_CLK_SYS, rp.CLOCKS_CLK_PERI_CTRL_AUXSRC_CLK_SYS,
125*MHz, cpuFreq,
125*MHz) cpuFreq)
clks.initTicks() clks.initTicks()
} }
src/machine/machine_rp2_spi.go
+3 -3
View File
@@ -104,13 +104,13 @@ func (spi SPI) Transfer(w byte) (byte, error) {
} }
func (spi SPI) SetBaudRate(br uint32) error { func (spi SPI) SetBaudRate(br uint32) error {
const freqin uint32 = 125 * MHz
const maxBaud uint32 = 66.5 * MHz // max output frequency is 66.5MHz on rp2040. see Note page 527. const maxBaud uint32 = 66.5 * MHz // max output frequency is 66.5MHz on rp2040. see Note page 527.
// Find smallest prescale value which puts output frequency in range of // Find smallest prescale value which puts output frequency in range of
// post-divide. Prescale is an even number from 2 to 254 inclusive. // post-divide. Prescale is an even number from 2 to 254 inclusive.
var prescale, postdiv uint32 var prescale, postdiv uint32
freq := CPUFrequency()
for prescale = 2; prescale < 255; prescale += 2 { for prescale = 2; prescale < 255; prescale += 2 {
if freqin < (prescale+2)*256*br { if freq < (prescale+2)*256*br {
break break
} }
} }
@@ -120,7 +120,7 @@ func (spi SPI) SetBaudRate(br uint32) error {
// Find largest post-divide which makes output <= baudrate. Post-divide is // Find largest post-divide which makes output <= baudrate. Post-divide is
// an integer in the range 1 to 256 inclusive. // an integer in the range 1 to 256 inclusive.
for postdiv = 256; postdiv > 1; postdiv-- { for postdiv = 256; postdiv > 1; postdiv-- {
if freqin/(prescale*(postdiv-1)) > br { if freq/(prescale*(postdiv-1)) > br {
break break
} }
} }
src/machine/machine_rp2_uart.go
+1 -1
View File
@@ -75,7 +75,7 @@ func (uart *UART) Configure(config UARTConfig) error {
// SetBaudRate sets the baudrate to be used for the UART. // SetBaudRate sets the baudrate to be used for the UART.
func (uart *UART) SetBaudRate(br uint32) { func (uart *UART) SetBaudRate(br uint32) {
div := 8 * 125 * MHz / br div := 8 * CPUFrequency() / br
ibrd := div >> 7 ibrd := div >> 7
var fbrd uint32 var fbrd uint32