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machine: replace hard-coded cpu frequencies on rp2xxx (#4767)
Missed from the earlier change that bumped the rp2350 frequency.
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@@ -144,7 +144,7 @@ var pllsysFB, pllsysPD1, pllsysPD2 uint32
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// Note that the entire init function is computed at compile time
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// by interp.
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func init() {
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fb, _, pd1, pd2, err := pllSearch{LockRefDiv: 1}.CalcDivs(xoscFreq*MHz, uint64(CPUFrequency()), MHz)
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fb, _, pd1, pd2, err := pllSearch{LockRefDiv: 1}.CalcDivs(xoscFreq*MHz, cpuFreq, MHz)
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if err != nil {
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panic(err)
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}
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@@ -185,15 +185,15 @@ func (clks *clocksType) init() {
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cref := clks.clock(clkRef)
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cref.configure(rp.CLOCKS_CLK_REF_CTRL_SRC_XOSC_CLKSRC,
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0, // No aux mux
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12*MHz,
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12*MHz)
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xoscFreq,
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xoscFreq)
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// clkSys = pllSys (125MHz) / 1 = 125MHz
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csys := clks.clock(clkSys)
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csys.configure(rp.CLOCKS_CLK_SYS_CTRL_SRC_CLKSRC_CLK_SYS_AUX,
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rp.CLOCKS_CLK_SYS_CTRL_AUXSRC_CLKSRC_PLL_SYS,
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125*MHz,
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125*MHz)
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cpuFreq,
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cpuFreq)
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// clkUSB = pllUSB (48MHz) / 1 = 48MHz
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cusb := clks.clock(clkUSB)
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@@ -217,8 +217,8 @@ func (clks *clocksType) init() {
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cperi := clks.clock(clkPeri)
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cperi.configure(0,
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rp.CLOCKS_CLK_PERI_CTRL_AUXSRC_CLK_SYS,
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125*MHz,
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125*MHz)
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cpuFreq,
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cpuFreq)
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clks.initTicks()
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}
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