mirror of
https://github.com/tinygo-org/drivers.git
synced 2026-08-14 03:43:42 +00:00
b3af3f594e
Previously, a new implementation had to be written for each processor
speed. This is tedious and error-prone, therefore I've rewritten all of
the assembly code using a tool that will calculate exactly how many NOP
instructions are required.
I've also switched from build tags to a switch statement over all
processor speeds.
All in all, this means that:
- Chips with a supported CPU performance will automatically be
supported (no build tags necessary).
- Adding a new chip is as easy as adding the MHz count to the
generator script and to the switch statement.
Right now this is only for the Cortex-M, but it's certainly feasible to
extend this to other architectures such as the AVR.
355 lines
5.4 KiB
Go
355 lines
5.4 KiB
Go
// +build cortexm
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package ws2812
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// Warning: autogenerated file. Instead of modifying this file, change
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// gen-ws2812-arm.go and run "go generate".
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import (
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"device"
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"runtime/interrupt"
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)
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func (d Device) writeByte16(c byte) {
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portSet, maskSet := d.Pin.PortMaskSet()
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portClear, maskClear := d.Pin.PortMaskClear()
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// Timings:
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// T0H: 4 - 6 cycles or 250.0ns - 375.0ns
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// T1H: 9 - 11 cycles or 562.5ns - 687.5ns
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// TLD: 8 - cycles or 500.0ns -
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mask := interrupt.Disable()
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value := uint32(c) << 24
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device.AsmFull(`
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1: @ send_bit
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str {maskSet}, {portSet} @ [2] T0H and T0L start here
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lsls {value}, #1 @ [1]
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bcs.n 2f @ [1/3] skip_store
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str {maskClear}, {portClear} @ [2] T0H -> T0L transition
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2: @ skip_store
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nop
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nop
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nop
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nop
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nop
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str {maskClear}, {portClear} @ [2] T1H -> T1L transition
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nop
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nop
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nop
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nop
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subs {i}, #1 @ [1]
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bne.n 1b @ [1/3] send_bit
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`, map[string]interface{}{
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"value": value,
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"i": 8,
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"maskSet": maskSet,
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"portSet": portSet,
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"maskClear": maskClear,
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"portClear": portClear,
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})
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interrupt.Restore(mask)
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}
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func (d Device) writeByte48(c byte) {
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portSet, maskSet := d.Pin.PortMaskSet()
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portClear, maskClear := d.Pin.PortMaskClear()
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// Timings:
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// T0H: 10 - 12 cycles or 208.3ns - 250.0ns
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// T1H: 27 - 29 cycles or 562.5ns - 604.2ns
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// TLD: 22 - cycles or 458.3ns -
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mask := interrupt.Disable()
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value := uint32(c) << 24
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device.AsmFull(`
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1: @ send_bit
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str {maskSet}, {portSet} @ [2] T0H and T0L start here
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nop
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nop
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nop
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nop
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nop
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nop
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lsls {value}, #1 @ [1]
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bcs.n 2f @ [1/3] skip_store
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str {maskClear}, {portClear} @ [2] T0H -> T0L transition
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2: @ skip_store
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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str {maskClear}, {portClear} @ [2] T1H -> T1L transition
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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subs {i}, #1 @ [1]
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bne.n 1b @ [1/3] send_bit
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`, map[string]interface{}{
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"value": value,
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"i": 8,
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"maskSet": maskSet,
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"portSet": portSet,
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"maskClear": maskClear,
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"portClear": portClear,
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})
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interrupt.Restore(mask)
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}
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func (d Device) writeByte64(c byte) {
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portSet, maskSet := d.Pin.PortMaskSet()
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portClear, maskClear := d.Pin.PortMaskClear()
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// Timings:
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// T0H: 13 - 15 cycles or 203.1ns - 234.4ns
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// T1H: 36 - 38 cycles or 562.5ns - 593.8ns
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// TLD: 29 - cycles or 453.1ns -
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mask := interrupt.Disable()
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value := uint32(c) << 24
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device.AsmFull(`
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1: @ send_bit
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str {maskSet}, {portSet} @ [2] T0H and T0L start here
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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lsls {value}, #1 @ [1]
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bcs.n 2f @ [1/3] skip_store
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str {maskClear}, {portClear} @ [2] T0H -> T0L transition
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2: @ skip_store
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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str {maskClear}, {portClear} @ [2] T1H -> T1L transition
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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subs {i}, #1 @ [1]
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bne.n 1b @ [1/3] send_bit
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`, map[string]interface{}{
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"value": value,
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"i": 8,
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"maskSet": maskSet,
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"portSet": portSet,
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"maskClear": maskClear,
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"portClear": portClear,
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})
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interrupt.Restore(mask)
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}
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func (d Device) writeByte120(c byte) {
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portSet, maskSet := d.Pin.PortMaskSet()
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portClear, maskClear := d.Pin.PortMaskClear()
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// Timings:
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// T0H: 24 - 26 cycles or 200.0ns - 216.7ns
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// T1H: 66 - 68 cycles or 550.0ns - 566.7ns
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// TLD: 54 - cycles or 450.0ns -
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mask := interrupt.Disable()
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value := uint32(c) << 24
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device.AsmFull(`
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1: @ send_bit
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str {maskSet}, {portSet} @ [2] T0H and T0L start here
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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lsls {value}, #1 @ [1]
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bcs.n 2f @ [1/3] skip_store
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str {maskClear}, {portClear} @ [2] T0H -> T0L transition
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2: @ skip_store
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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str {maskClear}, {portClear} @ [2] T1H -> T1L transition
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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subs {i}, #1 @ [1]
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bne.n 1b @ [1/3] send_bit
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`, map[string]interface{}{
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"value": value,
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"i": 8,
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"maskSet": maskSet,
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"portSet": portSet,
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"maskClear": maskClear,
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"portClear": portClear,
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})
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interrupt.Restore(mask)
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}
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