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BCG
111 lines
2.0 KiB
Go
111 lines
2.0 KiB
Go
// +build nrf52 nrf52840
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package ws2812
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// This file implements the WS2812 protocol for 64MHz Cortex-M4
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// microcontrollers.
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import (
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"device/arm"
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)
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// Send a single byte using the WS2812 protocol.
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func (d Device) WriteByte(c byte) error {
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// For the Cortex-M4 at 64MHz
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portSet, maskSet := d.Pin.PortMaskSet()
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portClear, maskClear := d.Pin.PortMaskClear()
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// See:
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// https://wp.josh.com/2014/05/13/ws2812-neopixels-are-not-so-finicky-once-you-get-to-know-them/
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// T0H: 17-19 cycles or 265.63ns - 296.88ns
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// T0L: 54-56 cycles or 843.75ns - 875.00ns
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// +: 71-75 cycles or 1109.38ns - 1171.88ns
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// T1H: 39-41 cycles or 609.38ns - 640.63ns
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// T1L: 30-32 cycles or 468.75ns - 500.0ns
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// +: 69-73 cycles or 1078.13ns - 1140.63ns
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// A branch is treated here as 1-3 cycles, because apparently it might get
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// speculated. This is more of a guess than hard fact, because the only docs
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// by ARM that state this are now considered superseded (by what?).
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value := uint32(c) << 24
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arm.AsmFull(`
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1: @ send_bit
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str {maskSet}, {portSet} @ [2] T0H and T0L start here
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lsls {value}, #1 @ [1]
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nop @ [13]
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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bcs.n 2f @ [1-3] skip_store
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str {maskClear}, {portClear} @ [2] T0H -> T0L transition
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2: @ skip_store
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nop @ [22]
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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str {maskClear}, {portClear} @ [2] T1H -> T1L transition
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nop @ [26]
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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subs {i}, #1 @ [1]
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bne.n 1b @ [1-3] send_bit
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`, map[string]interface{}{
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"value": value,
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"i": 8,
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"maskSet": maskSet,
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"portSet": portSet,
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"maskClear": maskClear,
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"portClear": portClear,
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})
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return nil
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}
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