mirror of
https://github.com/tinygo-org/drivers.git
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deadprogram
c21cd39813
This completely refactors the interface and implementation for the si5351 clock generator. The interface based on the Arduino implementation was both somewhat hard to work with and also missing a number of important features that are needed to use this chip for RF communication. Instead this new implementation draws inspiration from the efforts of the Traquino community mostly using the rp2040 processor. The TinyGo implementation is based on the patterns and code in the drivers repo for other i2c devices. It also includes some basic unit tests which are not comprehensive but at least provide some coverage. Signed-off-by: deadprogram <ron@hybridgroup.com>
215 lines
6.3 KiB
Go
215 lines
6.3 KiB
Go
package si5351
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import (
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"testing"
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)
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func TestSelectRDiv(t *testing.T) {
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d := &Device{}
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tests := []struct {
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name string
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freq Frequency
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wantDiv uint8
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wantFreq Frequency
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}{
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{"4kHz", 4000 * FREQ_MULT, OUTPUT_CLK_DIV_128, 4000 * FREQ_MULT * 128},
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{"8kHz", 8000 * FREQ_MULT, OUTPUT_CLK_DIV_64, 8000 * FREQ_MULT * 64},
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{"16kHz", 16000 * FREQ_MULT, OUTPUT_CLK_DIV_32, 16000 * FREQ_MULT * 32},
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{"32kHz", 32000 * FREQ_MULT, OUTPUT_CLK_DIV_16, 32000 * FREQ_MULT * 16},
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{"64kHz", 64000 * FREQ_MULT, OUTPUT_CLK_DIV_8, 64000 * FREQ_MULT * 8},
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{"128kHz", 128000 * FREQ_MULT, OUTPUT_CLK_DIV_4, 128000 * FREQ_MULT * 4},
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{"256kHz", 256000 * FREQ_MULT, OUTPUT_CLK_DIV_2, 256000 * FREQ_MULT * 2},
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{"512kHz", 512000 * FREQ_MULT, OUTPUT_CLK_DIV_1, 512000 * FREQ_MULT},
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{"1MHz", 1000000 * FREQ_MULT, OUTPUT_CLK_DIV_1, 1000000 * FREQ_MULT},
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}
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for _, tt := range tests {
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t.Run(tt.name, func(t *testing.T) {
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freq := tt.freq
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freq, gotDiv := d.selectRDiv(freq)
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if gotDiv != tt.wantDiv {
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t.Errorf("selectRDiv() div = %v, want %v", gotDiv, tt.wantDiv)
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}
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if freq != tt.wantFreq {
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t.Errorf("selectRDiv() freq = %v, want %v", freq, tt.wantFreq)
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}
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})
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}
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}
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func TestSelectRDivMS67(t *testing.T) {
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d := &Device{}
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tests := []struct {
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name string
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freq Frequency
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wantDiv uint8
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wantFreq Frequency
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}{
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{"4kHz", 4000 * FREQ_MULT, OUTPUT_CLK_DIV_128, 4000 * FREQ_MULT * 128},
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{"8kHz", 8000 * FREQ_MULT, OUTPUT_CLK_DIV_64, 8000 * FREQ_MULT * 64},
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{"16kHz", 16000 * FREQ_MULT, OUTPUT_CLK_DIV_32, 16000 * FREQ_MULT * 32},
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{"64kHz", 64000 * FREQ_MULT, OUTPUT_CLK_DIV_8, 64000 * FREQ_MULT * 8},
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{"256kHz", 256000 * FREQ_MULT, OUTPUT_CLK_DIV_2, 256000 * FREQ_MULT * 2},
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{"512kHz", 512000 * FREQ_MULT, OUTPUT_CLK_DIV_1, 512000 * FREQ_MULT},
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{"1MHz", 1000000 * FREQ_MULT, OUTPUT_CLK_DIV_1, 1000000 * FREQ_MULT},
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}
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for _, tt := range tests {
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t.Run(tt.name, func(t *testing.T) {
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freq := tt.freq
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freq, gotDiv := d.selectRDivMS67(freq)
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if gotDiv != tt.wantDiv {
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t.Errorf("selectRDivMS67() div = %v, want %v", gotDiv, tt.wantDiv)
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}
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if freq != tt.wantFreq {
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t.Errorf("selectRDivMS67() freq = %v, want %v", freq, tt.wantFreq)
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}
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})
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}
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}
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func TestCalculatePLL(t *testing.T) {
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d := &Device{}
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d.crystalFreq[0] = 25000000
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tests := []struct {
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name string
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freq Frequency
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wantMin Frequency
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wantMax Frequency
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}{
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{"600MHz", 600000000 * FREQ_MULT, 599000000 * FREQ_MULT, 601000000 * FREQ_MULT},
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{"750MHz", 750000000 * FREQ_MULT, 749000000 * FREQ_MULT, 751000000 * FREQ_MULT},
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{"900MHz", 900000000 * FREQ_MULT, 899000000 * FREQ_MULT, 901000000 * FREQ_MULT},
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{"BelowMin", 500000000 * FREQ_MULT, 600000000 * FREQ_MULT, 600000000 * FREQ_MULT},
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{"AboveMax", 1000000000 * FREQ_MULT, 900000000 * FREQ_MULT, 900000000 * FREQ_MULT},
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}
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for _, tt := range tests {
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t.Run(tt.name, func(t *testing.T) {
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got, reg := d.CalculatePLL(PLL_A, tt.freq, 0, false)
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if got < tt.wantMin || got > tt.wantMax {
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t.Errorf("CalculatePLL() = %v, want between %v and %v", got, tt.wantMin, tt.wantMax)
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}
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if reg.p1 == 0 || reg.p3 == 0 {
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t.Errorf("CalculatePLL() invalid register values: p1=%v, p2=%v, p3=%v", reg.p1, reg.p2, reg.p3)
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}
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})
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}
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}
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func TestCalculateMultisynth(t *testing.T) {
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d := &Device{}
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tests := []struct {
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name string
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freq Frequency
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pllFreq Frequency
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wantDiv bool
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}{
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{"10MHz from 800MHz", 10000000 * FREQ_MULT, 800000000 * FREQ_MULT, false},
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{"1MHz from 800MHz", 1000000 * FREQ_MULT, 800000000 * FREQ_MULT, false},
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{"Auto PLL 10MHz", 10000000 * FREQ_MULT, 0, false},
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{"150MHz DivBy4", 150000000 * FREQ_MULT, 600000000 * FREQ_MULT, true},
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{"BelowMin", 100000 * FREQ_MULT, 800000000 * FREQ_MULT, false},
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}
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for _, tt := range tests {
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t.Run(tt.name, func(t *testing.T) {
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got, reg := d.CalculateMultisynth(tt.freq, tt.pllFreq)
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if tt.pllFreq == 0 {
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// Auto mode should return a valid PLL frequency
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if got < PLL_VCO_MIN*FREQ_MULT || got > PLL_VCO_MAX*FREQ_MULT {
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t.Errorf("CalculateMultisynth() returned invalid PLL freq %v", got)
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}
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}
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if reg.p3 == 0 {
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t.Errorf("CalculateMultisynth() p3 should not be 0")
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}
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})
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}
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}
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func TestMultisynth67Calc(t *testing.T) {
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d := &Device{}
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tests := []struct {
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name string
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freq Frequency
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pllFreq Frequency
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wantErr bool
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}{
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{"10MHz Auto", 10000000 * FREQ_MULT, 0, false},
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{"100MHz Auto", 100000000 * FREQ_MULT, 0, false},
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{"100MHz from 800MHz", 100000000 * FREQ_MULT, 800000000 * FREQ_MULT, false},
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{"Invalid Division", 10000000 * FREQ_MULT, 777000000 * FREQ_MULT, true},
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}
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for _, tt := range tests {
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t.Run(tt.name, func(t *testing.T) {
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got, reg := d.multisynth67Calc(tt.freq, tt.pllFreq)
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if tt.pllFreq == 0 {
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if got < PLL_VCO_MIN*FREQ_MULT || got > PLL_VCO_MAX*FREQ_MULT {
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t.Errorf("multisynth67Calc() returned invalid PLL freq %v", got)
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}
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} else if tt.wantErr {
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if got != 0 {
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t.Errorf("multisynth67Calc() should return 0 for invalid division, got %v", got)
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}
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}
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if reg.p1 == 0 && !tt.wantErr {
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t.Errorf("multisynth67Calc() p1 should not be 0")
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}
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})
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}
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}
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func TestSetCorrection(t *testing.T) {
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// Skip this test as it requires a mock I2C bus
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t.Skip("Requires mock I2C bus implementation")
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}
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func TestSetRefFreq(t *testing.T) {
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d := &Device{}
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tests := []struct {
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name string
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freq CrystalFrequency
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wantFreq CrystalFrequency
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wantDiv uint8
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}{
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{"25MHz", 25000000, 25000000, CLKIN_DIV_1},
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{"50MHz", 50000000, 25000000, CLKIN_DIV_2},
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{"100MHz", 100000000, 25000000, CLKIN_DIV_4},
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{"30MHz", 30000000, 30000000, CLKIN_DIV_1},
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{"60MHz", 60000000, 30000000, CLKIN_DIV_2},
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}
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for _, tt := range tests {
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t.Run(tt.name, func(t *testing.T) {
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d.SetReferenceFrequency(PLLInputClockIn, tt.freq)
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if d.crystalFreq[PLLInputClockIn] != tt.wantFreq {
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t.Errorf("SetReferenceFrequency() freq = %v, want %v", d.crystalFreq[PLLInputClockIn], tt.wantFreq)
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}
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if d.clkinDiv != tt.wantDiv {
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t.Errorf("SetReferenceFrequency() clkinDiv = %v, want %v", d.clkinDiv, tt.wantDiv)
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}
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})
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}
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}
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func TestGetCorrection(t *testing.T) {
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d := &Device{}
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d.refCorrection[PLLInputXO] = 5000
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d.refCorrection[PLLInputClockIn] = -3000
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if got := d.GetCorrection(PLLInputXO); got != 5000 {
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t.Errorf("GetCorrection(PLLInputXO) = %v, want 5000", got)
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}
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if got := d.GetCorrection(PLLInputClockIn); got != -3000 {
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t.Errorf("GetCorrection(PLLInputClockIn) = %v, want -3000", got)
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}
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}
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