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espradio: implement support for wifi/BLE on the ESP32-C3
This is a work in progress. It does not yet work.
This commit is contained in:
Ayke van Laethem
@@ -0,0 +1,437 @@
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/*
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __ESP_BT_H__
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#define __ESP_BT_H__
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_err.h"
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#include "sdkconfig.h"
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#include "nimble/nimble_npl.h"
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#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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#include "driver/uart.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Bluetooth mode for controller enable/disable.
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*/
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typedef enum {
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ESP_BT_MODE_IDLE = 0x00, /*!< Bluetooth is not running */
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ESP_BT_MODE_BLE = 0x01, /*!< Run BLE mode */
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ESP_BT_MODE_CLASSIC_BT = 0x02, /*!< Run Classic BT mode */
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ESP_BT_MODE_BTDM = 0x03, /*!< Run dual mode */
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} esp_bt_mode_t;
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/**
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* @brief Bluetooth controller enable/disable/initialised/de-initialised status.
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*/
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typedef enum {
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ESP_BT_CONTROLLER_STATUS_IDLE = 0, /*!< Controller is in idle state */
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ESP_BT_CONTROLLER_STATUS_INITED, /*!< Controller is in initialising state */
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ESP_BT_CONTROLLER_STATUS_ENABLED, /*!< Controller is in enabled state */
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ESP_BT_CONTROLLER_STATUS_NUM, /*!< Controller is in disabled state */
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} esp_bt_controller_status_t;
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/**
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* @brief BLE tx power type
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* ESP_BLE_PWR_TYPE_CONN_HDL0-8: for each connection, and only be set after connection completed.
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* when disconnect, the correspond TX power is not effected.
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* ESP_BLE_PWR_TYPE_ADV : for advertising/scan response.
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* ESP_BLE_PWR_TYPE_SCAN : for scan.
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* ESP_BLE_PWR_TYPE_DEFAULT : if each connection's TX power is not set, it will use this default value.
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* if neither in scan mode nor in adv mode, it will use this default value.
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* If none of power type is set, system will use ESP_PWR_LVL_P3 as default for ADV/SCAN/CONN0-9.
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*/
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typedef enum {
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ESP_BLE_PWR_TYPE_CONN_HDL0 = 0, /*!< For connection handle 0 */
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ESP_BLE_PWR_TYPE_CONN_HDL1 = 1, /*!< For connection handle 1 */
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ESP_BLE_PWR_TYPE_CONN_HDL2 = 2, /*!< For connection handle 2 */
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ESP_BLE_PWR_TYPE_CONN_HDL3 = 3, /*!< For connection handle 3 */
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ESP_BLE_PWR_TYPE_CONN_HDL4 = 4, /*!< For connection handle 4 */
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ESP_BLE_PWR_TYPE_CONN_HDL5 = 5, /*!< For connection handle 5 */
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ESP_BLE_PWR_TYPE_CONN_HDL6 = 6, /*!< For connection handle 6 */
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ESP_BLE_PWR_TYPE_CONN_HDL7 = 7, /*!< For connection handle 7 */
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ESP_BLE_PWR_TYPE_CONN_HDL8 = 8, /*!< For connection handle 8 */
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ESP_BLE_PWR_TYPE_ADV = 9, /*!< For advertising */
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ESP_BLE_PWR_TYPE_SCAN = 10, /*!< For scan */
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ESP_BLE_PWR_TYPE_DEFAULT = 11, /*!< For default, if not set other, it will use default value */
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ESP_BLE_PWR_TYPE_NUM = 12, /*!< TYPE numbers */
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} esp_ble_power_type_t;
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/**
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* @brief Bluetooth TX power level(index), it's just a index corresponding to power(dbm).
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*/
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typedef enum {
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ESP_PWR_LVL_N24 = 0, /*!< Corresponding to -24dbm */
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ESP_PWR_LVL_N21 = 1, /*!< Corresponding to -21dbm */
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ESP_PWR_LVL_N18 = 2, /*!< Corresponding to -18dbm */
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ESP_PWR_LVL_N15 = 3, /*!< Corresponding to -15dbm */
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ESP_PWR_LVL_N12 = 4, /*!< Corresponding to -12dbm */
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ESP_PWR_LVL_N9 = 5, /*!< Corresponding to -9dbm */
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ESP_PWR_LVL_N6 = 6, /*!< Corresponding to -6dbm */
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ESP_PWR_LVL_N3 = 7, /*!< Corresponding to -3dbm */
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ESP_PWR_LVL_N0 = 8, /*!< Corresponding to 0dbm */
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ESP_PWR_LVL_P3 = 9, /*!< Corresponding to +3dbm */
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ESP_PWR_LVL_P6 = 10, /*!< Corresponding to +6dbm */
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ESP_PWR_LVL_P9 = 11, /*!< Corresponding to +9dbm */
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ESP_PWR_LVL_P12 = 12, /*!< Corresponding to +12dbm */
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ESP_PWR_LVL_P15 = 13, /*!< Corresponding to +15dbm */
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ESP_PWR_LVL_P16 = 14, /*!< Corresponding to +18dbm, this enum variable has been deprecated */
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ESP_PWR_LVL_P17 = 14, /*!< Corresponding to +18dbm, this enum variable has been deprecated */
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ESP_PWR_LVL_P18 = 14, /*!< Corresponding to +18dbm */
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ESP_PWR_LVL_P19 = 15, /*!< Corresponding to +20dbm, this enum variable has been deprecated */
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ESP_PWR_LVL_P20 = 15, /*!< Corresponding to +20dbm */
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ESP_PWR_LVL_INVALID = 0xFF, /*!< Indicates an invalid value */
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} esp_power_level_t;
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/**
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* @brief The enhanced type of which tx power, could set Advertising/Connection/Default and etc.
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*/
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typedef enum {
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ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT = 0,
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ESP_BLE_ENHANCED_PWR_TYPE_ADV,
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ESP_BLE_ENHANCED_PWR_TYPE_SCAN,
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ESP_BLE_ENHANCED_PWR_TYPE_INIT,
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ESP_BLE_ENHANCED_PWR_TYPE_CONN,
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ESP_BLE_ENHANCED_PWR_TYPE_MAX,
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} esp_ble_enhanced_power_type_t;
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/**
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* @brief Address type and address value.
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*/
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typedef struct {
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uint8_t type; /*!< Type of the Bluetooth address (public, random, etc.) */
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uint8_t val[6]; /*!< Array containing the 6-byte Bluetooth address value */
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} esp_ble_addr_t;
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/**
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* @brief Select buffers
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*/
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typedef enum {
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ESP_BLE_LOG_BUF_HCI = 0x02,
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ESP_BLE_LOG_BUF_CONTROLLER = 0x05,
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} esp_ble_log_buf_t;
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/**
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* @brief Set BLE TX power
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* Connection Tx power should only be set after connection created.
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* @param power_type : The type of which tx power, could set Advertising/Connection/Default and etc
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* @param power_level: Power level(index) corresponding to absolute value(dbm)
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* @return ESP_OK - success, other - failed
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*/
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esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level);
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/**
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* @brief Get BLE TX power
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* Connection Tx power should only be get after connection created.
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* @param power_type : The type of which tx power, could set Advertising/Connection/Default and etc
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* @return >= 0 - Power level, < 0 - Invalid
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*/
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esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type);
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/**
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* @brief ENHANCED API for Setting BLE TX power
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* Connection Tx power should only be set after connection created.
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* @param power_type : The enhanced type of which tx power, could set Advertising/Connection/Default and etc
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* @param handle : The handle of Advertising or Connection and the value 0 for other enhanced power types.
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* @param power_level: Power level(index) corresponding to absolute value(dbm)
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* @return ESP_OK - success, other - failed
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*/
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esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle, esp_power_level_t power_level);
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/**
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* @brief ENHANCED API of Getting BLE TX power
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* Connection Tx power should only be get after connection created.
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* @param power_type : The enhanced type of which tx power, could set Advertising/Connection/Default and etc
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* @param handle : The handle of Advertising or Connection and the value 0 for other enhanced power types.
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* @return >= 0 - Power level, < 0 - Invalid
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*/
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esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
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#define CONFIG_VERSION 0x20231124
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#define CONFIG_MAGIC 0x5A5AA5A5
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/**
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* @brief Controller config options, depend on config mask.
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* Config mask indicate which functions enabled, this means
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* some options or parameters of some functions enabled by config mask.
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*/
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typedef struct {
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uint32_t config_version; /*!< Version number of the defined structure */
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uint16_t ble_ll_resolv_list_size; /*!< Size of the resolvable private address list */
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uint16_t ble_hci_evt_hi_buf_count; /*!< Count of high buffers for HCI events */
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uint16_t ble_hci_evt_lo_buf_count; /*!< Count of low buffers for HCI events */
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uint8_t ble_ll_sync_list_cnt; /*!< Number of synchronization lists */
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uint8_t ble_ll_sync_cnt; /*!< Number of synchronizations */
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uint16_t ble_ll_rsp_dup_list_count; /*!< Count of duplicated lists for scan response packets */
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uint16_t ble_ll_adv_dup_list_count; /*!< Count of duplicated lists for advertising packets */
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uint8_t ble_ll_tx_pwr_dbm; /*!< Tx power (transmit power) in dBm */
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uint64_t rtc_freq; /*!< Frequency of RTC (Real-Time Clock) */
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uint16_t ble_ll_sca; /*!< Sleep Clock Accuracy (SCA) parameter */
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uint8_t ble_ll_scan_phy_number; /*!< Number of PHYs supported for scanning */
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uint16_t ble_ll_conn_def_auth_pyld_tmo; /*!< Connection default authentication payload timeout */
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uint8_t ble_ll_jitter_usecs; /*!< Jitter time in microseconds */
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uint16_t ble_ll_sched_max_adv_pdu_usecs; /*!< Maximum time in microseconds for advertising PDU scheduling */
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uint16_t ble_ll_sched_direct_adv_max_usecs; /*!< Maximum time in microseconds for directed advertising scheduling */
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uint16_t ble_ll_sched_adv_max_usecs; /*!< Maximum time in microseconds for advertising scheduling */
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uint16_t ble_scan_rsp_data_max_len; /*!< Maximum length of scan response data */
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uint8_t ble_ll_cfg_num_hci_cmd_pkts; /*!< Number of HCI command packets that can be queued */
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uint32_t ble_ll_ctrl_proc_timeout_ms; /*!< Control processing timeout in milliseconds */
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uint16_t nimble_max_connections; /*!< Maximum number of connections supported */
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uint8_t ble_whitelist_size; /*!< Size of the white list */
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uint16_t ble_acl_buf_size; /*!< Buffer size of ACL (Asynchronous Connection-Less) data */
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uint16_t ble_acl_buf_count; /*!< Buffer count of ACL data */
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uint16_t ble_hci_evt_buf_size; /*!< Buffer size for HCI event data */
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uint16_t ble_multi_adv_instances; /*!< Number of advertising instances */
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uint16_t ble_ext_adv_max_size; /*!< Maximum size of extended advertising data */
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uint16_t controller_task_stack_size; /*!< Size of Bluetooth controller task stack */
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uint8_t controller_task_prio; /*!< Priority of the Bluetooth task */
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uint8_t controller_run_cpu; /*!< CPU number on which the Bluetooth controller task runs */
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uint8_t enable_qa_test; /*!< Enable for QA test */
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uint8_t enable_bqb_test; /*!< Enable for BQB test */
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uint8_t enable_uart_hci; /*!< Enable UART for HCI (Host Controller Interface) */
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uint8_t ble_hci_uart_port; /*!< Port of UART for HCI */
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uint32_t ble_hci_uart_baud; /*!< Baudrate of UART for HCI */
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uint8_t ble_hci_uart_data_bits; /*!< Data bits of UART for HCI */
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uint8_t ble_hci_uart_stop_bits; /*!< Stop bits of UART for HCI */
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uint8_t ble_hci_uart_flow_ctrl; /*!< Flow control of UART for HCI */
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uint8_t ble_hci_uart_uart_parity; /*!< UART parity */
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uint8_t enable_tx_cca; /*!< Enable Clear Channel Assessment (CCA) when transmitting */
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uint8_t cca_rssi_thresh; /*!< RSSI threshold for CCA */
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uint8_t sleep_en; /*!< Enable sleep functionality */
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uint8_t coex_phy_coded_tx_rx_time_limit; /*!< Coexistence PHY coded TX and RX time limit */
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uint8_t dis_scan_backoff; /*!< Disable scan backoff */
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uint8_t ble_scan_classify_filter_enable; /*!< Enable classification filter for BLE scan */
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uint8_t cca_drop_mode; /*!< CCA drop mode */
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int8_t cca_low_tx_pwr; /*!< Low TX power setting for CCA */
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uint8_t main_xtal_freq; /*!< Main crystal frequency */
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uint8_t cpu_freq_mhz; /*!< CPU frequency in megahertz */
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uint8_t ignore_wl_for_direct_adv; /*!< Ignore the white list for directed advertising */
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uint8_t enable_pcl; /*!< Enable power control */
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uint8_t csa2_select; /*!< Select CSA#2*/
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uint32_t config_magic; /*!< Configuration magic value */
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} esp_bt_controller_config_t;
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#define BT_CONTROLLER_INIT_CONFIG_DEFAULT() { \
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.config_version = CONFIG_VERSION, \
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.ble_ll_resolv_list_size = CONFIG_BT_LE_LL_RESOLV_LIST_SIZE, \
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.ble_hci_evt_hi_buf_count = DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT, \
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.ble_hci_evt_lo_buf_count = DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT, \
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.ble_ll_sync_list_cnt = DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST, \
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.ble_ll_sync_cnt = DEFAULT_BT_LE_MAX_PERIODIC_SYNCS, \
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.ble_ll_rsp_dup_list_count = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT, \
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.ble_ll_adv_dup_list_count = CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT, \
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.ble_ll_tx_pwr_dbm = BLE_LL_TX_PWR_DBM_N, \
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.rtc_freq = RTC_FREQ_N, \
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.ble_ll_sca = CONFIG_BT_LE_LL_SCA, \
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.ble_ll_scan_phy_number = BLE_LL_SCAN_PHY_NUMBER_N, \
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.ble_ll_conn_def_auth_pyld_tmo = BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N, \
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.ble_ll_jitter_usecs = BLE_LL_JITTER_USECS_N, \
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.ble_ll_sched_max_adv_pdu_usecs = BLE_LL_SCHED_MAX_ADV_PDU_USECS_N, \
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.ble_ll_sched_direct_adv_max_usecs = BLE_LL_SCHED_DIRECT_ADV_MAX_USECS_N, \
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.ble_ll_sched_adv_max_usecs = BLE_LL_SCHED_ADV_MAX_USECS_N, \
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.ble_scan_rsp_data_max_len = DEFAULT_BT_LE_SCAN_RSP_DATA_MAX_LEN_N, \
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.ble_ll_cfg_num_hci_cmd_pkts = BLE_LL_CFG_NUM_HCI_CMD_PKTS_N, \
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.ble_ll_ctrl_proc_timeout_ms = BLE_LL_CTRL_PROC_TIMEOUT_MS_N, \
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.nimble_max_connections = DEFAULT_BT_LE_MAX_CONNECTIONS, \
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.ble_whitelist_size = DEFAULT_BT_NIMBLE_WHITELIST_SIZE, \
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.ble_acl_buf_size = DEFAULT_BT_LE_ACL_BUF_SIZE, \
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.ble_acl_buf_count = DEFAULT_BT_LE_ACL_BUF_COUNT, \
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.ble_hci_evt_buf_size = DEFAULT_BT_LE_HCI_EVT_BUF_SIZE, \
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.ble_multi_adv_instances = DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES, \
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.ble_ext_adv_max_size = DEFAULT_BT_LE_EXT_ADV_MAX_SIZE, \
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.controller_task_stack_size = NIMBLE_LL_STACK_SIZE, \
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.controller_task_prio = ESP_TASK_BT_CONTROLLER_PRIO, \
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.controller_run_cpu = 0, \
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.enable_qa_test = RUN_QA_TEST, \
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.enable_bqb_test = RUN_BQB_TEST, \
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.enable_uart_hci = HCI_UART_EN, \
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.ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \
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.ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \
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.ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \
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.ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \
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.ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \
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.ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \
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.enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \
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.cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \
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.sleep_en = NIMBLE_SLEEP_ENABLE, \
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.coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
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.dis_scan_backoff = NIMBLE_DISABLE_SCAN_BACKOFF, \
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.ble_scan_classify_filter_enable = 1, \
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.main_xtal_freq = CONFIG_XTAL_FREQ, \
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.cpu_freq_mhz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, \
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.ignore_wl_for_direct_adv = 0, \
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.enable_pcl = 0, \
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.csa2_select = DEFAULT_BT_LE_50_FEATURE_SUPPORT, \
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.config_magic = CONFIG_MAGIC, \
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}
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/**
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* @brief Initialize BT controller to allocate task and other resource.
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* This function should be called only once, before any other BT functions are called.
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* @param cfg: Initial configuration of BT controller.
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* @return ESP_OK - success, other - failed
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*/
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esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg);
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/**
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* @brief Get BT controller is initialised/de-initialised/enabled/disabled
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* @return status value
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*/
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esp_bt_controller_status_t esp_bt_controller_get_status(void);
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/**
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* @brief Get BLE TX power
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* Connection Tx power should only be get after connection created.
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* @param power_type : The type of which tx power, could set Advertising/Connection/Default and etc
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* @return >= 0 - Power level, < 0 - Invalid
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*/
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esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type);
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/**
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* @brief De-initialize BT controller to free resource and delete task.
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* You should stop advertising and scanning, as well as
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* disconnect all existing connections before de-initializing BT controller.
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*
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* This function should be called only once, after any other BT functions are called.
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* This function is not whole completed, esp_bt_controller_init cannot called after this function.
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* @return ESP_OK - success, other - failed
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*/
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esp_err_t esp_bt_controller_deinit(void);
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/**
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* @brief Enable BT controller.
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* Due to a known issue, you cannot call esp_bt_controller_enable() a second time
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* to change the controller mode dynamically. To change controller mode, call
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* esp_bt_controller_disable() and then call esp_bt_controller_enable() with the new mode.
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* @param mode : the mode(BLE/BT/BTDM) to enable. For compatible of API, retain this argument.
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* @return ESP_OK - success, other - failed
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*/
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esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode);
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/**
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* @brief Disable BT controller
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* @return ESP_OK - success, other - failed
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*/
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esp_err_t esp_bt_controller_disable(void);
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/** @brief esp_vhci_host_callback
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* used for vhci call host function to notify what host need to do
|
||||
*/
|
||||
typedef struct esp_vhci_host_callback {
|
||||
void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
|
||||
int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
|
||||
} esp_vhci_host_callback_t;
|
||||
|
||||
/** @brief esp_vhci_host_check_send_available
|
||||
* used for check actively if the host can send packet to controller or not.
|
||||
* @return true for ready to send, false means cannot send packet
|
||||
*/
|
||||
bool esp_vhci_host_check_send_available(void);
|
||||
|
||||
/** @brief esp_vhci_host_send_packet
|
||||
* host send packet to controller
|
||||
*
|
||||
* Should not call this function from within a critical section
|
||||
* or when the scheduler is suspended.
|
||||
*
|
||||
* @param data the packet point
|
||||
* @param len the packet length
|
||||
*/
|
||||
void esp_vhci_host_send_packet(uint8_t *data, uint16_t len);
|
||||
|
||||
/** @brief esp_vhci_host_register_callback
|
||||
* register the vhci reference callback
|
||||
* struct defined by vhci_host_callback structure.
|
||||
* @param callback esp_vhci_host_callback type variable
|
||||
* @return ESP_OK - success, ESP_FAIL - failed
|
||||
*/
|
||||
esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback);
|
||||
|
||||
/** @brief esp_bt_controller_mem_release
|
||||
* release the controller memory as per the mode
|
||||
*
|
||||
* This function releases the BSS, data and other sections of the controller to heap. The total size is about 70k bytes.
|
||||
*
|
||||
* esp_bt_controller_mem_release(mode) should be called only before esp_bt_controller_init()
|
||||
* or after esp_bt_controller_deinit().
|
||||
*
|
||||
* Note that once BT controller memory is released, the process cannot be reversed. It means you cannot use the bluetooth
|
||||
* mode which you have released by this function.
|
||||
*
|
||||
* If your firmware will later upgrade the Bluetooth controller mode (BLE -> BT Classic or disabled -> enabled)
|
||||
* then do not call this function.
|
||||
*
|
||||
* If the app calls esp_bt_controller_enable(ESP_BT_MODE_BLE) to use BLE only then it is safe to call
|
||||
* esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT) at initialization time to free unused BT Classic memory.
|
||||
*
|
||||
* If the mode is ESP_BT_MODE_BTDM, then it may be useful to call API esp_bt_mem_release(ESP_BT_MODE_BTDM) instead,
|
||||
* which internally calls esp_bt_controller_mem_release(ESP_BT_MODE_BTDM) and additionally releases the BSS and data
|
||||
* consumed by the BT/BLE host stack to heap. For more details about usage please refer to the documentation of
|
||||
* esp_bt_mem_release() function
|
||||
*
|
||||
* @param mode : the mode want to release memory
|
||||
* @return ESP_OK - success, other - failed
|
||||
*/
|
||||
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode);
|
||||
|
||||
/** @brief esp_bt_mem_release
|
||||
* release controller memory and BSS and data section of the BT/BLE host stack as per the mode
|
||||
*
|
||||
* This function first releases controller memory by internally calling esp_bt_controller_mem_release().
|
||||
* Additionally, if the mode is set to ESP_BT_MODE_BTDM, it also releases the BSS and data consumed by the BT/BLE host stack to heap
|
||||
*
|
||||
* Note that once BT memory is released, the process cannot be reversed. It means you cannot use the bluetooth
|
||||
* mode which you have released by this function.
|
||||
*
|
||||
* If your firmware will later upgrade the Bluetooth controller mode (BLE -> BT Classic or disabled -> enabled)
|
||||
* then do not call this function.
|
||||
*
|
||||
* If you never intend to use bluetooth in a current boot-up cycle, you can call esp_bt_mem_release(ESP_BT_MODE_BTDM)
|
||||
* before esp_bt_controller_init or after esp_bt_controller_deinit.
|
||||
*
|
||||
* For example, if a user only uses bluetooth for setting the WiFi configuration, and does not use bluetooth in the rest of the product operation".
|
||||
* In such cases, after receiving the WiFi configuration, you can disable/deinit bluetooth and release its memory.
|
||||
* Below is the sequence of APIs to be called for such scenarios:
|
||||
*
|
||||
* esp_bluedroid_disable();
|
||||
* esp_bluedroid_deinit();
|
||||
* esp_bt_controller_disable();
|
||||
* esp_bt_controller_deinit();
|
||||
* esp_bt_mem_release(ESP_BT_MODE_BTDM);
|
||||
*
|
||||
* @param mode : the mode whose memory is to be released
|
||||
* @return ESP_OK - success, other - failed
|
||||
*/
|
||||
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode);
|
||||
|
||||
/**
|
||||
* @brief Returns random static address or -1 if not present.
|
||||
* @return ESP_OK - success, other - failed
|
||||
*/
|
||||
extern int esp_ble_hw_get_static_addr(esp_ble_addr_t *addr);
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
/**
|
||||
* @brief dump all log information cached in buffers.
|
||||
* @param output : true for log dump, false will take no effect
|
||||
*/
|
||||
void esp_ble_controller_log_dump_all(bool output);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ESP_BT_H__ */
|
||||
@@ -0,0 +1,22 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef PHY_INIT_DATA_H
|
||||
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
|
||||
#include "esp_phy_init.h"
|
||||
#include "sdkconfig.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// There is no init data for ESP32H2 right now, could be added when necessary.
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PHY_INIT_DATA_H */
|
||||
@@ -0,0 +1,988 @@
|
||||
/*
|
||||
* Automatically generated file. DO NOT EDIT.
|
||||
* Espressif IoT Development Framework (ESP-IDF) 5.1.2 Configuration Header
|
||||
*/
|
||||
#pragma once
|
||||
#define CONFIG_SOC_ADC_SUPPORTED 1
|
||||
#define CONFIG_SOC_ANA_CMPR_SUPPORTED 1
|
||||
#define CONFIG_SOC_DEDICATED_GPIO_SUPPORTED 1
|
||||
#define CONFIG_SOC_UART_SUPPORTED 1
|
||||
#define CONFIG_SOC_GDMA_SUPPORTED 1
|
||||
#define CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED 1
|
||||
#define CONFIG_SOC_PCNT_SUPPORTED 1
|
||||
#define CONFIG_SOC_MCPWM_SUPPORTED 1
|
||||
#define CONFIG_SOC_TWAI_SUPPORTED 1
|
||||
#define CONFIG_SOC_BT_SUPPORTED 1
|
||||
#define CONFIG_SOC_GPTIMER_SUPPORTED 1
|
||||
#define CONFIG_SOC_IEEE802154_SUPPORTED 1
|
||||
#define CONFIG_SOC_IEEE802154_BLE_ONLY 1
|
||||
#define CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED 1
|
||||
#define CONFIG_SOC_TEMP_SENSOR_SUPPORTED 1
|
||||
#define CONFIG_SOC_SUPPORTS_SECURE_DL_MODE 1
|
||||
#define CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD 1
|
||||
#define CONFIG_SOC_RTC_FAST_MEM_SUPPORTED 1
|
||||
#define CONFIG_SOC_RTC_MEM_SUPPORTED 1
|
||||
#define CONFIG_SOC_I2S_SUPPORTED 1
|
||||
#define CONFIG_SOC_SDM_SUPPORTED 1
|
||||
#define CONFIG_SOC_ETM_SUPPORTED 1
|
||||
#define CONFIG_SOC_RMT_SUPPORTED 1
|
||||
#define CONFIG_SOC_PARLIO_SUPPORTED 1
|
||||
#define CONFIG_SOC_GPSPI_SUPPORTED 1
|
||||
#define CONFIG_SOC_LEDC_SUPPORTED 1
|
||||
#define CONFIG_SOC_I2C_SUPPORTED 1
|
||||
#define CONFIG_SOC_SYSTIMER_SUPPORTED 1
|
||||
#define CONFIG_SOC_AES_SUPPORTED 1
|
||||
#define CONFIG_SOC_MPI_SUPPORTED 1
|
||||
#define CONFIG_SOC_SHA_SUPPORTED 1
|
||||
#define CONFIG_SOC_HMAC_SUPPORTED 1
|
||||
#define CONFIG_SOC_DIG_SIGN_SUPPORTED 1
|
||||
#define CONFIG_SOC_ECC_SUPPORTED 1
|
||||
#define CONFIG_SOC_ECC_EXTENDED_MODES_SUPPORTED 1
|
||||
#define CONFIG_SOC_ECDSA_SUPPORTED 1
|
||||
#define CONFIG_SOC_FLASH_ENC_SUPPORTED 1
|
||||
#define CONFIG_SOC_SECURE_BOOT_SUPPORTED 1
|
||||
#define CONFIG_SOC_BOD_SUPPORTED 1
|
||||
#define CONFIG_SOC_APM_SUPPORTED 1
|
||||
#define CONFIG_SOC_PMU_SUPPORTED 1
|
||||
#define CONFIG_SOC_LP_TIMER_SUPPORTED 1
|
||||
#define CONFIG_SOC_LP_AON_SUPPORTED 1
|
||||
#define CONFIG_SOC_PAU_SUPPORTED 1
|
||||
#define CONFIG_SOC_CLK_TREE_SUPPORTED 1
|
||||
#define CONFIG_SOC_XTAL_SUPPORT_32M 1
|
||||
#define CONFIG_SOC_AES_SUPPORT_DMA 1
|
||||
#define CONFIG_SOC_AES_GDMA 1
|
||||
#define CONFIG_SOC_AES_SUPPORT_AES_128 1
|
||||
#define CONFIG_SOC_AES_SUPPORT_AES_256 1
|
||||
#define CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED 1
|
||||
#define CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1
|
||||
#define CONFIG_SOC_ADC_MONITOR_SUPPORTED 1
|
||||
#define CONFIG_SOC_ADC_DMA_SUPPORTED 1
|
||||
#define CONFIG_SOC_ADC_PERIPH_NUM 1
|
||||
#define CONFIG_SOC_ADC_MAX_CHANNEL_NUM 5
|
||||
#define CONFIG_SOC_ADC_ATTEN_NUM 4
|
||||
#define CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM 1
|
||||
#define CONFIG_SOC_ADC_PATT_LEN_MAX 8
|
||||
#define CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH 12
|
||||
#define CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH 12
|
||||
#define CONFIG_SOC_ADC_DIGI_IIR_FILTER_NUM 2
|
||||
#define CONFIG_SOC_ADC_DIGI_MONITOR_NUM 2
|
||||
#define CONFIG_SOC_ADC_DIGI_RESULT_BYTES 4
|
||||
#define CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV 4
|
||||
#define CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
|
||||
#define CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
|
||||
#define CONFIG_SOC_ADC_RTC_MIN_BITWIDTH 12
|
||||
#define CONFIG_SOC_ADC_RTC_MAX_BITWIDTH 12
|
||||
#define CONFIG_SOC_ADC_CALIBRATION_V1_SUPPORTED 1
|
||||
#define CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED 1
|
||||
#define CONFIG_SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED 1
|
||||
#define CONFIG_SOC_ADC_TEMPERATURE_SHARE_INTR 1
|
||||
#define CONFIG_SOC_BROWNOUT_RESET_SUPPORTED 1
|
||||
#define CONFIG_SOC_SHARED_IDCACHE_SUPPORTED 1
|
||||
#define CONFIG_SOC_CACHE_FREEZE_SUPPORTED 1
|
||||
#define CONFIG_SOC_CPU_CORES_NUM 1
|
||||
#define CONFIG_SOC_CPU_INTR_NUM 32
|
||||
#define CONFIG_SOC_CPU_HAS_FLEXIBLE_INTC 1
|
||||
#define CONFIG_SOC_INT_PLIC_SUPPORTED 1
|
||||
#define CONFIG_SOC_CPU_BREAKPOINTS_NUM 4
|
||||
#define CONFIG_SOC_CPU_WATCHPOINTS_NUM 4
|
||||
#define CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 0x80000000
|
||||
#define CONFIG_SOC_CPU_HAS_PMA 1
|
||||
#define CONFIG_SOC_CPU_IDRAM_SPLIT_USING_PMP 1
|
||||
#define CONFIG_SOC_MMU_PAGE_SIZE_CONFIGURABLE 1
|
||||
#define CONFIG_SOC_MMU_PERIPH_NUM 1
|
||||
#define CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM 1
|
||||
#define CONFIG_SOC_MMU_DI_VADDR_SHARED 1
|
||||
#define CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN 3072
|
||||
#define CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH 16
|
||||
#define CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US 1100
|
||||
#define CONFIG_SOC_GDMA_GROUPS 1
|
||||
#define CONFIG_SOC_GDMA_PAIRS_PER_GROUP 3
|
||||
#define CONFIG_SOC_GDMA_SUPPORT_ETM 1
|
||||
#define CONFIG_SOC_ETM_GROUPS 1
|
||||
#define CONFIG_SOC_ETM_CHANNELS_PER_GROUP 50
|
||||
#define CONFIG_SOC_GPIO_PORT 1
|
||||
#define CONFIG_SOC_GPIO_PIN_COUNT 28
|
||||
#define CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1
|
||||
#define CONFIG_SOC_GPIO_SUPPORT_PIN_HYS_FILTER 1
|
||||
#define CONFIG_SOC_GPIO_FLEX_GLITCH_FILTER_NUM 8
|
||||
#define CONFIG_SOC_GPIO_SUPPORT_ETM 1
|
||||
#define CONFIG_SOC_GPIO_ETM_EVENTS_PER_GROUP 8
|
||||
#define CONFIG_SOC_GPIO_ETM_TASKS_PER_GROUP 8
|
||||
#define CONFIG_SOC_GPIO_SUPPORT_RTC_INDEPENDENT 1
|
||||
#define CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x000000000FFF807F
|
||||
#define CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD 1
|
||||
#define CONFIG_SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP 1
|
||||
#define CONFIG_SOC_RTCIO_PIN_COUNT 8
|
||||
#define CONFIG_SOC_RTCIO_HOLD_SUPPORTED 1
|
||||
#define CONFIG_SOC_DEDIC_GPIO_OUT_CHANNELS_NUM 8
|
||||
#define CONFIG_SOC_DEDIC_GPIO_IN_CHANNELS_NUM 8
|
||||
#define CONFIG_SOC_DEDIC_PERIPH_ALWAYS_ENABLE 1
|
||||
#define CONFIG_SOC_ANA_CMPR_NUM 1
|
||||
#define CONFIG_SOC_I2C_NUM 2
|
||||
#define CONFIG_SOC_I2C_FIFO_LEN 32
|
||||
#define CONFIG_SOC_I2C_CMD_REG_NUM 8
|
||||
#define CONFIG_SOC_I2C_SUPPORT_SLAVE 1
|
||||
#define CONFIG_SOC_I2C_SUPPORT_HW_CLR_BUS 1
|
||||
#define CONFIG_SOC_I2C_SUPPORT_XTAL 1
|
||||
#define CONFIG_SOC_I2C_SUPPORT_RTC 1
|
||||
#define CONFIG_SOC_I2S_NUM 1
|
||||
#define CONFIG_SOC_I2S_HW_VERSION_2 1
|
||||
#define CONFIG_SOC_I2S_SUPPORTS_XTAL 1
|
||||
#define CONFIG_SOC_I2S_SUPPORTS_PLL_F96M 1
|
||||
#define CONFIG_SOC_I2S_SUPPORTS_PLL_F64M 1
|
||||
#define CONFIG_SOC_I2S_SUPPORTS_PCM 1
|
||||
#define CONFIG_SOC_I2S_SUPPORTS_PDM 1
|
||||
#define CONFIG_SOC_I2S_SUPPORTS_PDM_TX 1
|
||||
#define CONFIG_SOC_I2S_PDM_MAX_TX_LINES 2
|
||||
#define CONFIG_SOC_I2S_SUPPORTS_TDM 1
|
||||
#define CONFIG_SOC_I2S_TDM_FULL_DATA_WIDTH 1
|
||||
#define CONFIG_SOC_LEDC_SUPPORT_PLL_DIV_CLOCK 1
|
||||
#define CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK 1
|
||||
#define CONFIG_SOC_LEDC_CHANNEL_NUM 6
|
||||
#define CONFIG_SOC_LEDC_TIMER_BIT_WIDTH 20
|
||||
#define CONFIG_SOC_LEDC_SUPPORT_FADE_STOP 1
|
||||
#define CONFIG_SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED 1
|
||||
#define CONFIG_SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX 16
|
||||
#define CONFIG_SOC_LEDC_FADE_PARAMS_BIT_WIDTH 10
|
||||
#define CONFIG_SOC_MPU_MIN_REGION_SIZE 0x20000000
|
||||
#define CONFIG_SOC_MPU_REGIONS_MAX_NUM 8
|
||||
#define CONFIG_SOC_PCNT_GROUPS 1
|
||||
#define CONFIG_SOC_PCNT_UNITS_PER_GROUP 4
|
||||
#define CONFIG_SOC_PCNT_CHANNELS_PER_UNIT 2
|
||||
#define CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT 2
|
||||
#define CONFIG_SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1
|
||||
#define CONFIG_SOC_RMT_GROUPS 1
|
||||
#define CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP 2
|
||||
#define CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP 2
|
||||
#define CONFIG_SOC_RMT_CHANNELS_PER_GROUP 4
|
||||
#define CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL 48
|
||||
#define CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG 1
|
||||
#define CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION 1
|
||||
#define CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP 1
|
||||
#define CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT 1
|
||||
#define CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1
|
||||
#define CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO 1
|
||||
#define CONFIG_SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1
|
||||
#define CONFIG_SOC_RMT_SUPPORT_XTAL 1
|
||||
#define CONFIG_SOC_RMT_SUPPORT_RC_FAST 1
|
||||
#define CONFIG_SOC_MCPWM_GROUPS 1
|
||||
#define CONFIG_SOC_MCPWM_TIMERS_PER_GROUP 3
|
||||
#define CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP 3
|
||||
#define CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR 2
|
||||
#define CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR 2
|
||||
#define CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR 2
|
||||
#define CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP 3
|
||||
#define CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP 1
|
||||
#define CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER 3
|
||||
#define CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP 3
|
||||
#define CONFIG_SOC_MCPWM_SWSYNC_CAN_PROPAGATE 1
|
||||
#define CONFIG_SOC_MCPWM_SUPPORT_ETM 1
|
||||
#define CONFIG_SOC_MCPWM_CAPTURE_CLK_FROM_GROUP 1
|
||||
#define CONFIG_SOC_PARLIO_GROUPS 1
|
||||
#define CONFIG_SOC_PARLIO_TX_UNITS_PER_GROUP 1
|
||||
#define CONFIG_SOC_PARLIO_RX_UNITS_PER_GROUP 1
|
||||
#define CONFIG_SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH 8
|
||||
#define CONFIG_SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH 8
|
||||
#define CONFIG_SOC_PARLIO_TX_CLK_SUPPORT_GATING 1
|
||||
#define CONFIG_SOC_PARLIO_TRANS_BIT_ALIGN 1
|
||||
#define CONFIG_SOC_RSA_MAX_BIT_LEN 3072
|
||||
#define CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE 3968
|
||||
#define CONFIG_SOC_SHA_SUPPORT_DMA 1
|
||||
#define CONFIG_SOC_SHA_SUPPORT_RESUME 1
|
||||
#define CONFIG_SOC_SHA_GDMA 1
|
||||
#define CONFIG_SOC_SHA_SUPPORT_SHA1 1
|
||||
#define CONFIG_SOC_SHA_SUPPORT_SHA224 1
|
||||
#define CONFIG_SOC_SHA_SUPPORT_SHA256 1
|
||||
#define CONFIG_SOC_SDM_GROUPS 1
|
||||
#define CONFIG_SOC_SDM_CHANNELS_PER_GROUP 4
|
||||
#define CONFIG_SOC_SDM_CLK_SUPPORT_PLL_F48M 1
|
||||
#define CONFIG_SOC_SDM_CLK_SUPPORT_XTAL 1
|
||||
#define CONFIG_SOC_SPI_PERIPH_NUM 2
|
||||
#define CONFIG_SOC_SPI_MAX_CS_NUM 6
|
||||
#define CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE 64
|
||||
#define CONFIG_SOC_SPI_SUPPORT_DDRCLK 1
|
||||
#define CONFIG_SOC_SPI_SLAVE_SUPPORT_SEG_TRANS 1
|
||||
#define CONFIG_SOC_SPI_SUPPORT_CD_SIG 1
|
||||
#define CONFIG_SOC_SPI_SUPPORT_CONTINUOUS_TRANS 1
|
||||
#define CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2 1
|
||||
#define CONFIG_SOC_SPI_SUPPORT_CLK_XTAL 1
|
||||
#define CONFIG_SOC_SPI_SUPPORT_CLK_PLL_F48M 1
|
||||
#define CONFIG_SOC_SPI_SUPPORT_CLK_RC_FAST 1
|
||||
#define CONFIG_SOC_MEMSPI_IS_INDEPENDENT 1
|
||||
#define CONFIG_SOC_SPI_MAX_PRE_DIVIDER 16
|
||||
#define CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE 1
|
||||
#define CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND 1
|
||||
#define CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME 1
|
||||
#define CONFIG_SOC_SPI_MEM_SUPPORT_IDLE_INTR 1
|
||||
#define CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND 1
|
||||
#define CONFIG_SOC_SPI_MEM_SUPPORT_CHECK_SUS 1
|
||||
#define CONFIG_SOC_SPI_MEM_SUPPORT_WRAP 1
|
||||
#define CONFIG_SOC_MEMSPI_SRC_FREQ_64M_SUPPORTED 1
|
||||
#define CONFIG_SOC_MEMSPI_SRC_FREQ_32M_SUPPORTED 1
|
||||
#define CONFIG_SOC_MEMSPI_SRC_FREQ_16M_SUPPORTED 1
|
||||
#define CONFIG_SOC_MEMSPI_CLOCK_IS_INDEPENDENT 1
|
||||
#define CONFIG_SOC_SYSTIMER_COUNTER_NUM 2
|
||||
#define CONFIG_SOC_SYSTIMER_ALARM_NUM 3
|
||||
#define CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO 32
|
||||
#define CONFIG_SOC_SYSTIMER_BIT_WIDTH_HI 20
|
||||
#define CONFIG_SOC_SYSTIMER_FIXED_DIVIDER 1
|
||||
#define CONFIG_SOC_SYSTIMER_SUPPORT_RC_FAST 1
|
||||
#define CONFIG_SOC_SYSTIMER_INT_LEVEL 1
|
||||
#define CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE 1
|
||||
#define CONFIG_SOC_SYSTIMER_SUPPORT_ETM 1
|
||||
#define CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO 32
|
||||
#define CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI 16
|
||||
#define CONFIG_SOC_TIMER_GROUPS 2
|
||||
#define CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP 1
|
||||
#define CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH 54
|
||||
#define CONFIG_SOC_TIMER_GROUP_SUPPORT_XTAL 1
|
||||
#define CONFIG_SOC_TIMER_GROUP_SUPPORT_RC_FAST 1
|
||||
#define CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS 2
|
||||
#define CONFIG_SOC_TIMER_SUPPORT_ETM 1
|
||||
#define CONFIG_SOC_MWDT_SUPPORT_XTAL 1
|
||||
#define CONFIG_SOC_TWAI_CONTROLLER_NUM 1
|
||||
#define CONFIG_SOC_TWAI_CLK_SUPPORT_XTAL 1
|
||||
#define CONFIG_SOC_TWAI_BRP_MIN 2
|
||||
#define CONFIG_SOC_TWAI_BRP_MAX 32768
|
||||
#define CONFIG_SOC_TWAI_SUPPORTS_RX_STATUS 1
|
||||
#define CONFIG_SOC_EFUSE_DIS_PAD_JTAG 1
|
||||
#define CONFIG_SOC_EFUSE_DIS_USB_JTAG 1
|
||||
#define CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT 1
|
||||
#define CONFIG_SOC_EFUSE_SOFT_DIS_JTAG 1
|
||||
#define CONFIG_SOC_EFUSE_DIS_ICACHE 1
|
||||
#define CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1
|
||||
#define CONFIG_SOC_EFUSE_ECDSA_USE_HARDWARE_K 1
|
||||
#define CONFIG_SOC_SECURE_BOOT_V2_RSA 1
|
||||
#define CONFIG_SOC_SECURE_BOOT_V2_ECC 1
|
||||
#define CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
|
||||
#define CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS 1
|
||||
#define CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY 1
|
||||
#define CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX 32
|
||||
#define CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES 1
|
||||
#define CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128 1
|
||||
#define CONFIG_SOC_CRYPTO_DPA_PROTECTION_SUPPORTED 1
|
||||
#define CONFIG_SOC_UART_NUM 2
|
||||
#define CONFIG_SOC_UART_FIFO_LEN 128
|
||||
#define CONFIG_SOC_UART_BITRATE_MAX 5000000
|
||||
#define CONFIG_SOC_UART_SUPPORT_RTC_CLK 1
|
||||
#define CONFIG_SOC_UART_SUPPORT_XTAL_CLK 1
|
||||
#define CONFIG_SOC_UART_SUPPORT_WAKEUP_INT 1
|
||||
#define CONFIG_SOC_UART_SUPPORT_FSM_TX_WAIT_SEND 1
|
||||
#define CONFIG_SOC_COEX_HW_PTI 1
|
||||
#define CONFIG_SOC_EXTERNAL_COEX_ADVANCE 1
|
||||
#define CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE 21
|
||||
#define CONFIG_SOC_PM_SUPPORT_BT_WAKEUP 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_CPU_PD 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_MODEM_PD 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_XTAL32K_PD 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_RC32K_PD 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_RC_FAST_PD 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_TOP_PD 1
|
||||
#define CONFIG_SOC_PM_PAU_LINK_NUM 4
|
||||
#define CONFIG_SOC_PM_CPU_RETENTION_BY_SW 1
|
||||
#define CONFIG_SOC_PM_MODEM_RETENTION_BY_REGDMA 1
|
||||
#define CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY 1
|
||||
#define CONFIG_SOC_PM_RETENTION_SW_TRIGGER_REGDMA 1
|
||||
#define CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION 1
|
||||
#define CONFIG_SOC_CLK_XTAL32K_SUPPORTED 1
|
||||
#define CONFIG_SOC_CLK_OSC_SLOW_SUPPORTED 1
|
||||
#define CONFIG_SOC_CLK_RC32K_SUPPORTED 1
|
||||
#define CONFIG_SOC_CLK_LP_FAST_SUPPORT_LP_PLL 1
|
||||
#define CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT 1
|
||||
#define CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC 1
|
||||
#define CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL 1
|
||||
#define CONFIG_SOC_TEMPERATURE_SENSOR_INTR_SUPPORT 1
|
||||
#define CONFIG_SOC_BLE_SUPPORTED 1
|
||||
#define CONFIG_SOC_BLE_MESH_SUPPORTED 1
|
||||
#define CONFIG_SOC_ESP_NIMBLE_CONTROLLER 1
|
||||
#define CONFIG_SOC_BLE_50_SUPPORTED 1
|
||||
#define CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED 1
|
||||
#define CONFIG_SOC_BLE_POWER_CONTROL_SUPPORTED 1
|
||||
#define CONFIG_SOC_BLE_MULTI_CONN_OPTIMIZATION 1
|
||||
#define CONFIG_SOC_BLE_PERIODIC_ADV_ENH_SUPPORTED 1
|
||||
#define CONFIG_IDF_CMAKE 1
|
||||
#define CONFIG_IDF_TARGET_ARCH_RISCV 1
|
||||
#define CONFIG_IDF_TARGET_ARCH "riscv"
|
||||
#define CONFIG_IDF_TARGET "esp32h2"
|
||||
#define CONFIG_IDF_TARGET_ESP32H2 1
|
||||
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0010
|
||||
#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
|
||||
#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
|
||||
#define CONFIG_APP_BUILD_BOOTLOADER 1
|
||||
#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
|
||||
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
|
||||
#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
|
||||
#define CONFIG_BOOTLOADER_LOG_LEVEL_INFO 1
|
||||
#define CONFIG_BOOTLOADER_LOG_LEVEL 3
|
||||
#define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
|
||||
#define CONFIG_BOOTLOADER_WDT_ENABLE 1
|
||||
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
|
||||
#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x0
|
||||
#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
|
||||
#define CONFIG_SECURE_BOOT_V2_RSA_SUPPORTED 1
|
||||
#define CONFIG_SECURE_BOOT_V2_ECC_SUPPORTED 1
|
||||
#define CONFIG_SECURE_BOOT_V2_PREFERRED 1
|
||||
#define CONFIG_SECURE_ROM_DL_MODE_ENABLED 1
|
||||
#define CONFIG_APP_COMPILE_TIME_DATE 1
|
||||
#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 16
|
||||
#define CONFIG_ESP_ROM_HAS_CRC_LE 1
|
||||
#define CONFIG_ESP_ROM_HAS_CRC_BE 1
|
||||
#define CONFIG_ESP_ROM_UART_CLK_IS_XTAL 1
|
||||
#define CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM 3
|
||||
#define CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING 1
|
||||
#define CONFIG_ESP_ROM_GET_CLK_FREQ 1
|
||||
#define CONFIG_ESP_ROM_HAS_HAL_WDT 1
|
||||
#define CONFIG_ESP_ROM_HAS_HAL_SYSTIMER 1
|
||||
#define CONFIG_ESP_ROM_HAS_HEAP_TLSF 1
|
||||
#define CONFIG_ESP_ROM_TLSF_CHECK_PATCH 1
|
||||
#define CONFIG_ESP_ROM_HAS_LAYOUT_TABLE 1
|
||||
#define CONFIG_ESP_ROM_HAS_SPI_FLASH 1
|
||||
#define CONFIG_ESP_ROM_WITHOUT_REGI2C 1
|
||||
#define CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT 1
|
||||
#define CONFIG_ESP_ROM_WDT_INIT_PATCH 1
|
||||
#define CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE 1
|
||||
#define CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT 1
|
||||
#define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
|
||||
#define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
|
||||
#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
|
||||
#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
|
||||
#define CONFIG_ESPTOOLPY_FLASHFREQ_64M 1
|
||||
#define CONFIG_ESPTOOLPY_FLASHFREQ "48m"
|
||||
#define CONFIG_ESPTOOLPY_FLASHSIZE_2MB 1
|
||||
#define CONFIG_ESPTOOLPY_FLASHSIZE "2MB"
|
||||
#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
|
||||
#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
|
||||
#define CONFIG_ESPTOOLPY_AFTER_RESET 1
|
||||
#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
|
||||
#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
|
||||
#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
|
||||
#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
|
||||
#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
|
||||
#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
|
||||
#define CONFIG_PARTITION_TABLE_MD5 1
|
||||
#define CONFIG_COMPILER_OPTIMIZATION_SIZE 1
|
||||
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
|
||||
#define CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB 1
|
||||
#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
|
||||
#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
|
||||
#define CONFIG_COMPILER_STACK_CHECK_MODE_NONE 1
|
||||
#define CONFIG_APPTRACE_DEST_NONE 1
|
||||
#define CONFIG_APPTRACE_DEST_UART_NONE 1
|
||||
#define CONFIG_APPTRACE_UART_TASK_PRIO 1
|
||||
#define CONFIG_APPTRACE_LOCK_ENABLE 1
|
||||
#define CONFIG_BT_ENABLED 1
|
||||
#define CONFIG_BT_BLUEDROID_ENABLED 1
|
||||
#define CONFIG_BT_CONTROLLER_ENABLED 1
|
||||
#define CONFIG_BT_BTC_TASK_STACK_SIZE 3072
|
||||
#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE 0
|
||||
#define CONFIG_BT_BTU_TASK_STACK_SIZE 4096
|
||||
#define CONFIG_BT_BLE_ENABLED 1
|
||||
#define CONFIG_BT_GATTS_ENABLE 1
|
||||
#define CONFIG_BT_GATT_MAX_SR_PROFILES 8
|
||||
#define CONFIG_BT_GATT_MAX_SR_ATTRIBUTES 100
|
||||
#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
|
||||
#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
|
||||
#define CONFIG_BT_GATTC_ENABLE 1
|
||||
#define CONFIG_BT_GATTC_MAX_CACHE_CHAR 40
|
||||
#define CONFIG_BT_GATTC_NOTIF_REG_MAX 5
|
||||
#define CONFIG_BT_GATTC_CONNECT_RETRY_COUNT 3
|
||||
#define CONFIG_BT_BLE_SMP_ENABLE 1
|
||||
#define CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_HCI_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_BTM_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_SDP_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_GAP_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_PAN_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_A2D_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_MCA_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_HID_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_APPL_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_GATT_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_SMP_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_BTC_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_OSI_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING 1
|
||||
#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL 2
|
||||
#define CONFIG_BT_ACL_CONNECTIONS 4
|
||||
#define CONFIG_BT_MULTI_CONNECTION_ENBALE 1
|
||||
#define CONFIG_BT_SMP_ENABLE 1
|
||||
#define CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT 30
|
||||
#define CONFIG_BT_MAX_DEVICE_NAME_LEN 32
|
||||
#define CONFIG_BT_BLE_RPA_TIMEOUT 900
|
||||
#define CONFIG_BT_BLE_50_FEATURES_SUPPORTED 1
|
||||
#define CONFIG_BT_LE_HCI_INTERFACE_USE_RAM 1
|
||||
#define CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT 1
|
||||
#define CONFIG_BT_LE_50_FEATURE_SUPPORT 1
|
||||
#define CONFIG_BT_LE_LL_CFG_FEAT_LE_2M_PHY 1
|
||||
#define CONFIG_BT_LE_LL_CFG_FEAT_LE_CODED_PHY 1
|
||||
#define CONFIG_BT_LE_EXT_ADV 1
|
||||
#define CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES 1
|
||||
#define CONFIG_BT_LE_EXT_ADV_MAX_SIZE 1650
|
||||
#define CONFIG_BT_LE_ENABLE_PERIODIC_ADV 1
|
||||
#define CONFIG_BT_LE_PERIODIC_ADV_SYNC_TRANSFER 1
|
||||
#define CONFIG_BT_LE_MAX_PERIODIC_SYNCS 1
|
||||
#define CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST 5
|
||||
#define CONFIG_BT_LE_MSYS_1_BLOCK_COUNT 12
|
||||
#define CONFIG_BT_LE_MSYS_1_BLOCK_SIZE 256
|
||||
#define CONFIG_BT_LE_MSYS_2_BLOCK_COUNT 24
|
||||
#define CONFIG_BT_LE_MSYS_2_BLOCK_SIZE 320
|
||||
#define CONFIG_BT_LE_ACL_BUF_COUNT 10
|
||||
#define CONFIG_BT_LE_ACL_BUF_SIZE 517
|
||||
#define CONFIG_BT_LE_HCI_EVT_BUF_SIZE 257
|
||||
#define CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT 30
|
||||
#define CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT 8
|
||||
#define CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE 4096
|
||||
#define CONFIG_BT_LE_LL_RESOLV_LIST_SIZE 4
|
||||
#define CONFIG_BT_LE_SECURITY_ENABLE 1
|
||||
#define CONFIG_BT_LE_SM_LEGACY 1
|
||||
#define CONFIG_BT_LE_SM_SC 1
|
||||
#define CONFIG_BT_LE_LL_CFG_FEAT_LE_ENCRYPTION 1
|
||||
#define CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS 1
|
||||
#define CONFIG_BT_LE_WHITELIST_SIZE 12
|
||||
#define CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT 20
|
||||
#define CONFIG_BT_LE_LL_SCA 60
|
||||
#define CONFIG_BT_LE_MAX_CONNECTIONS 3
|
||||
#define CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS 1
|
||||
#define CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF 0
|
||||
#define CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL 1
|
||||
#define CONFIG_BT_LE_USE_ESP_TIMER 1
|
||||
#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1
|
||||
#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100
|
||||
#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
|
||||
#define CONFIG_BT_LE_SCAN_DUPL 1
|
||||
#define CONFIG_BT_LE_SCAN_DUPL_TYPE_DEVICE 1
|
||||
#define CONFIG_BT_LE_SCAN_DUPL_TYPE 0
|
||||
#define CONFIG_BT_LE_SCAN_DUPL_CACHE_SIZE 100
|
||||
#define CONFIG_BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD 0
|
||||
#define CONFIG_BT_LE_MSYS_INIT_IN_CONTROLLER 1
|
||||
#define CONFIG_SPI_MASTER_ISR_IN_IRAM 1
|
||||
#define CONFIG_SPI_SLAVE_ISR_IN_IRAM 1
|
||||
#define CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM 1
|
||||
#define CONFIG_EFUSE_MAX_BLK_LEN 256
|
||||
#define CONFIG_ESP_TLS_USING_MBEDTLS 1
|
||||
#define CONFIG_ESP_TLS_USE_DS_PERIPHERAL 1
|
||||
#define CONFIG_ESP_COEX_SW_COEXIST_ENABLE 1
|
||||
#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
|
||||
#define CONFIG_ETH_ENABLED 1
|
||||
#define CONFIG_ETH_USE_SPI_ETHERNET 1
|
||||
#define CONFIG_ESP_EVENT_POST_FROM_ISR 1
|
||||
#define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
|
||||
#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
|
||||
#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
|
||||
#define CONFIG_HTTPD_MAX_URI_LEN 512
|
||||
#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
|
||||
#define CONFIG_HTTPD_PURGE_BUF_LEN 32
|
||||
#define CONFIG_ESP32H2_REV_MIN_0 1
|
||||
#define CONFIG_ESP32H2_REV_MIN_FULL 0
|
||||
#define CONFIG_ESP_REV_MIN_FULL 0
|
||||
#define CONFIG_ESP32H2_REV_MAX_FULL 99
|
||||
#define CONFIG_ESP_REV_MAX_FULL 99
|
||||
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
|
||||
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_IEEE802154 1
|
||||
#define CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_TWO 1
|
||||
#define CONFIG_ESP32H2_UNIVERSAL_MAC_ADDRESSES_TWO 1
|
||||
#define CONFIG_ESP32H2_UNIVERSAL_MAC_ADDRESSES 2
|
||||
#define CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND 1
|
||||
#define CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND 1
|
||||
#define CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY 0
|
||||
#define CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS 1
|
||||
#define CONFIG_RTC_CLK_SRC_INT_RC 1
|
||||
#define CONFIG_RTC_CLK_CAL_CYCLES 1024
|
||||
#define CONFIG_PERIPH_CTRL_FUNC_IN_IRAM 1
|
||||
#define CONFIG_XTAL_FREQ_32 1
|
||||
#define CONFIG_XTAL_FREQ 32
|
||||
#define CONFIG_ESP_CRYPTO_DPA_PROTECTION_AT_STARTUP 1
|
||||
#define CONFIG_ESP_CRYPTO_DPA_PROTECTION_LEVEL_LOW 1
|
||||
#define CONFIG_ESP_CRYPTO_DPA_PROTECTION_LEVEL 1
|
||||
#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
|
||||
#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
|
||||
#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
|
||||
#define CONFIG_ESP_NETIF_USES_TCPIP_WITH_BSD_API 1
|
||||
#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
|
||||
#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
|
||||
#define CONFIG_ESP_PHY_MAX_TX_POWER 20
|
||||
#define CONFIG_ESP_PHY_RF_CAL_PARTIAL 1
|
||||
#define CONFIG_ESP_PHY_CALIBRATION_MODE 0
|
||||
#define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1
|
||||
#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_96 1
|
||||
#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 96
|
||||
#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
|
||||
#define CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS 0
|
||||
#define CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE 1
|
||||
#define CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT 1
|
||||
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
|
||||
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2304
|
||||
#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 3584
|
||||
#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
|
||||
#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
|
||||
#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
|
||||
#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
|
||||
#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
|
||||
#define CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED 1
|
||||
#define CONFIG_ESP_CONSOLE_UART 1
|
||||
#define CONFIG_ESP_CONSOLE_UART_NUM 0
|
||||
#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
|
||||
#define CONFIG_ESP_INT_WDT 1
|
||||
#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300
|
||||
#define CONFIG_ESP_TASK_WDT_EN 1
|
||||
#define CONFIG_ESP_TASK_WDT_INIT 1
|
||||
#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
|
||||
#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
|
||||
#define CONFIG_ESP_DEBUG_OCDAWARE 1
|
||||
#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
|
||||
#define CONFIG_ESP_BROWNOUT_DET 1
|
||||
#define CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7 1
|
||||
#define CONFIG_ESP_BROWNOUT_DET_LVL 7
|
||||
#define CONFIG_ESP_SYSTEM_BROWNOUT_INTR 1
|
||||
#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
|
||||
#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
|
||||
#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
|
||||
#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 3584
|
||||
#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
|
||||
#define CONFIG_ESP_TIMER_TASK_AFFINITY 0x0
|
||||
#define CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0 1
|
||||
#define CONFIG_ESP_TIMER_ISR_AFFINITY 0x1
|
||||
#define CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0 1
|
||||
#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1
|
||||
#define CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM 10
|
||||
#define CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM 32
|
||||
#define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER 1
|
||||
#define CONFIG_ESP_WIFI_TX_BUFFER_TYPE 1
|
||||
#define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM 32
|
||||
#define CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER 1
|
||||
#define CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF 0
|
||||
#define CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF 5
|
||||
#define CONFIG_ESP_WIFI_AMPDU_TX_ENABLED 1
|
||||
#define CONFIG_ESP_WIFI_TX_BA_WIN 6
|
||||
#define CONFIG_ESP_WIFI_AMPDU_RX_ENABLED 1
|
||||
#define CONFIG_ESP_WIFI_RX_BA_WIN 6
|
||||
#define CONFIG_ESP_WIFI_NVS_ENABLED 1
|
||||
#define CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN 752
|
||||
#define CONFIG_ESP_WIFI_MGMT_SBUF_NUM 32
|
||||
#define CONFIG_ESP_WIFI_IRAM_OPT 1
|
||||
#define CONFIG_ESP_WIFI_RX_IRAM_OPT 1
|
||||
#define CONFIG_ESP_WIFI_ENABLE_WPA3_SAE 1
|
||||
#define CONFIG_ESP_WIFI_ENABLE_SAE_PK 1
|
||||
#define CONFIG_ESP_WIFI_SOFTAP_SAE_SUPPORT 1
|
||||
#define CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA 1
|
||||
#define CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE 1
|
||||
#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
|
||||
#define CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM 7
|
||||
#define CONFIG_ESP_WIFI_MBEDTLS_CRYPTO 1
|
||||
#define CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT 1
|
||||
#define CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT 1
|
||||
#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
|
||||
#define CONFIG_FATFS_VOLUME_COUNT 2
|
||||
#define CONFIG_FATFS_LFN_NONE 1
|
||||
#define CONFIG_FATFS_SECTOR_4096 1
|
||||
#define CONFIG_FATFS_CODEPAGE_437 1
|
||||
#define CONFIG_FATFS_CODEPAGE 437
|
||||
#define CONFIG_FATFS_FS_LOCK 0
|
||||
#define CONFIG_FATFS_TIMEOUT_MS 10000
|
||||
#define CONFIG_FATFS_PER_FILE_CACHE 1
|
||||
#define CONFIG_FATFS_VFS_FSTAT_BLKSIZE 0
|
||||
#define CONFIG_FREERTOS_UNICORE 1
|
||||
#define CONFIG_FREERTOS_HZ 100
|
||||
#define CONFIG_FREERTOS_OPTIMIZED_SCHEDULER 1
|
||||
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
|
||||
#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
|
||||
#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1536
|
||||
#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
|
||||
#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
|
||||
#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
|
||||
#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
|
||||
#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
|
||||
#define CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES 1
|
||||
#define CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS 1
|
||||
#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
|
||||
#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
|
||||
#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
|
||||
#define CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER 1
|
||||
#define CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1 1
|
||||
#define CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER 1
|
||||
#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
|
||||
#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
|
||||
#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
|
||||
#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
|
||||
#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
|
||||
#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
|
||||
#define CONFIG_HAL_SYSTIMER_USE_ROM_IMPL 1
|
||||
#define CONFIG_HAL_WDT_USE_ROM_IMPL 1
|
||||
#define CONFIG_HAL_SPI_MASTER_FUNC_IN_IRAM 1
|
||||
#define CONFIG_HAL_SPI_SLAVE_FUNC_IN_IRAM 1
|
||||
#define CONFIG_HEAP_POISONING_DISABLED 1
|
||||
#define CONFIG_HEAP_TRACING_OFF 1
|
||||
#define CONFIG_HEAP_TLSF_USE_ROM_IMPL 1
|
||||
#define CONFIG_IEEE802154_ENABLED 1
|
||||
#define CONFIG_IEEE802154_RX_BUFFER_SIZE 20
|
||||
#define CONFIG_IEEE802154_CCA_ED 1
|
||||
#define CONFIG_IEEE802154_CCA_MODE 1
|
||||
#define CONFIG_IEEE802154_CCA_THRESHOLD -60
|
||||
#define CONFIG_IEEE802154_PENDING_TABLE_SIZE 20
|
||||
#define CONFIG_LOG_DEFAULT_LEVEL_INFO 1
|
||||
#define CONFIG_LOG_DEFAULT_LEVEL 3
|
||||
#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
|
||||
#define CONFIG_LOG_MAXIMUM_LEVEL 3
|
||||
#define CONFIG_LOG_COLORS 1
|
||||
#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
|
||||
#define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
|
||||
#define CONFIG_LWIP_TCPIP_TASK_PRIO 18
|
||||
#define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
|
||||
#define CONFIG_LWIP_TIMERS_ONDEMAND 1
|
||||
#define CONFIG_LWIP_ND6 1
|
||||
#define CONFIG_LWIP_MAX_SOCKETS 10
|
||||
#define CONFIG_LWIP_SO_REUSE 1
|
||||
#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
|
||||
#define CONFIG_LWIP_IP4_FRAG 1
|
||||
#define CONFIG_LWIP_IP6_FRAG 1
|
||||
#define CONFIG_LWIP_IP_REASS_MAX_PBUFS 10
|
||||
#define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
|
||||
#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
|
||||
#define CONFIG_LWIP_ESP_MLDV6_REPORT 1
|
||||
#define CONFIG_LWIP_MLDV6_TMR_INTERVAL 40
|
||||
#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
|
||||
#define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1
|
||||
#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
|
||||
#define CONFIG_LWIP_DHCP_OPTIONS_LEN 68
|
||||
#define CONFIG_LWIP_NUM_NETIF_CLIENT_DATA 0
|
||||
#define CONFIG_LWIP_DHCP_COARSE_TIMER_SECS 1
|
||||
#define CONFIG_LWIP_DHCPS 1
|
||||
#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
|
||||
#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
|
||||
#define CONFIG_LWIP_IPV4 1
|
||||
#define CONFIG_LWIP_IPV6 1
|
||||
#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
|
||||
#define CONFIG_LWIP_NETIF_LOOPBACK 1
|
||||
#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
|
||||
#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
|
||||
#define CONFIG_LWIP_MAX_LISTENING_TCP 16
|
||||
#define CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION 1
|
||||
#define CONFIG_LWIP_TCP_MAXRTX 12
|
||||
#define CONFIG_LWIP_TCP_SYNMAXRTX 12
|
||||
#define CONFIG_LWIP_TCP_MSS 1440
|
||||
#define CONFIG_LWIP_TCP_TMR_INTERVAL 250
|
||||
#define CONFIG_LWIP_TCP_MSL 60000
|
||||
#define CONFIG_LWIP_TCP_FIN_WAIT_TIMEOUT 20000
|
||||
#define CONFIG_LWIP_TCP_SND_BUF_DEFAULT 5760
|
||||
#define CONFIG_LWIP_TCP_WND_DEFAULT 5760
|
||||
#define CONFIG_LWIP_TCP_RECVMBOX_SIZE 6
|
||||
#define CONFIG_LWIP_TCP_QUEUE_OOSEQ 1
|
||||
#define CONFIG_LWIP_TCP_OOSEQ_TIMEOUT 6
|
||||
#define CONFIG_LWIP_TCP_OOSEQ_MAX_PBUFS 4
|
||||
#define CONFIG_LWIP_TCP_OVERSIZE_MSS 1
|
||||
#define CONFIG_LWIP_TCP_RTO_TIME 1500
|
||||
#define CONFIG_LWIP_MAX_UDP_PCBS 16
|
||||
#define CONFIG_LWIP_UDP_RECVMBOX_SIZE 6
|
||||
#define CONFIG_LWIP_CHECKSUM_CHECK_ICMP 1
|
||||
#define CONFIG_LWIP_TCPIP_TASK_STACK_SIZE 3072
|
||||
#define CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY 1
|
||||
#define CONFIG_LWIP_TCPIP_TASK_AFFINITY 0x7FFFFFFF
|
||||
#define CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE 3
|
||||
#define CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS 5
|
||||
#define CONFIG_LWIP_ICMP 1
|
||||
#define CONFIG_LWIP_MAX_RAW_PCBS 16
|
||||
#define CONFIG_LWIP_SNTP_MAX_SERVERS 1
|
||||
#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
|
||||
#define CONFIG_LWIP_BRIDGEIF_MAX_PORTS 7
|
||||
#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
|
||||
#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
|
||||
#define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
|
||||
#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
|
||||
#define CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_NONE 1
|
||||
#define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
|
||||
#define CONFIG_LWIP_HOOK_IP6_INPUT_NONE 1
|
||||
#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
|
||||
#define CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN 1
|
||||
#define CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN 16384
|
||||
#define CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN 4096
|
||||
#define CONFIG_MBEDTLS_ECDH_LEGACY_CONTEXT 1
|
||||
#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
|
||||
#define CONFIG_MBEDTLS_PKCS7_C 1
|
||||
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
|
||||
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
|
||||
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS 200
|
||||
#define CONFIG_MBEDTLS_ECP_RESTARTABLE 1
|
||||
#define CONFIG_MBEDTLS_CMAC_C 1
|
||||
#define CONFIG_MBEDTLS_HARDWARE_AES 1
|
||||
#define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
|
||||
#define CONFIG_MBEDTLS_HARDWARE_MPI 1
|
||||
#define CONFIG_MBEDTLS_MPI_USE_INTERRUPT 1
|
||||
#define CONFIG_MBEDTLS_HARDWARE_SHA 1
|
||||
#define CONFIG_MBEDTLS_HARDWARE_ECC 1
|
||||
#define CONFIG_MBEDTLS_ECC_OTHER_CURVES_SOFT_FALLBACK 1
|
||||
#define CONFIG_MBEDTLS_ROM_MD5 1
|
||||
#define CONFIG_MBEDTLS_HARDWARE_ECDSA_VERIFY 1
|
||||
#define CONFIG_MBEDTLS_HAVE_TIME 1
|
||||
#define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
|
||||
#define CONFIG_MBEDTLS_SHA512_C 1
|
||||
#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
|
||||
#define CONFIG_MBEDTLS_TLS_SERVER 1
|
||||
#define CONFIG_MBEDTLS_TLS_CLIENT 1
|
||||
#define CONFIG_MBEDTLS_TLS_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
|
||||
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
|
||||
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
|
||||
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
|
||||
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
|
||||
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
|
||||
#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
|
||||
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
|
||||
#define CONFIG_MBEDTLS_SSL_ALPN 1
|
||||
#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
|
||||
#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
|
||||
#define CONFIG_MBEDTLS_AES_C 1
|
||||
#define CONFIG_MBEDTLS_CCM_C 1
|
||||
#define CONFIG_MBEDTLS_GCM_C 1
|
||||
#define CONFIG_MBEDTLS_PEM_PARSE_C 1
|
||||
#define CONFIG_MBEDTLS_PEM_WRITE_C 1
|
||||
#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
|
||||
#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
|
||||
#define CONFIG_MBEDTLS_ECP_C 1
|
||||
#define CONFIG_MBEDTLS_ECDH_C 1
|
||||
#define CONFIG_MBEDTLS_ECDSA_C 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
|
||||
#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
|
||||
#define CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM 1
|
||||
#define CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI 1
|
||||
#define CONFIG_MQTT_PROTOCOL_311 1
|
||||
#define CONFIG_MQTT_TRANSPORT_SSL 1
|
||||
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
|
||||
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
|
||||
#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
|
||||
#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
|
||||
#define CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT 1
|
||||
#define CONFIG_OPENTHREAD_NETWORK_NAME "OpenThread-ESP"
|
||||
#define CONFIG_OPENTHREAD_MESH_LOCAL_PREFIX "fd00:db8:a0:0::/64"
|
||||
#define CONFIG_OPENTHREAD_NETWORK_CHANNEL 15
|
||||
#define CONFIG_OPENTHREAD_NETWORK_PANID 0x1234
|
||||
#define CONFIG_OPENTHREAD_NETWORK_EXTPANID "dead00beef00cafe"
|
||||
#define CONFIG_OPENTHREAD_NETWORK_MASTERKEY "00112233445566778899aabbccddeeff"
|
||||
#define CONFIG_OPENTHREAD_NETWORK_PSKC "104810e2315100afd6bc9215a6bfac53"
|
||||
#define CONFIG_OPENTHREAD_XTAL_ACCURACY 130
|
||||
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_0 1
|
||||
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_1 1
|
||||
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_2 1
|
||||
#define CONFIG_PTHREAD_TASK_PRIO_DEFAULT 5
|
||||
#define CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT 3072
|
||||
#define CONFIG_PTHREAD_TASK_CORE_DEFAULT -1
|
||||
#define CONFIG_PTHREAD_TASK_NAME_DEFAULT "pthread"
|
||||
#define CONFIG_MMU_PAGE_SIZE_32KB 1
|
||||
#define CONFIG_MMU_PAGE_MODE "32KB"
|
||||
#define CONFIG_MMU_PAGE_SIZE 0x8000
|
||||
#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
|
||||
#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
|
||||
#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
|
||||
#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 20
|
||||
#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 1
|
||||
#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 8192
|
||||
#define CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC 1
|
||||
#define CONFIG_SPI_FLASH_BROWNOUT_RESET 1
|
||||
#define CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORTED 1
|
||||
#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
|
||||
#define CONFIG_SPIFFS_MAX_PARTITIONS 3
|
||||
#define CONFIG_SPIFFS_CACHE 1
|
||||
#define CONFIG_SPIFFS_CACHE_WR 1
|
||||
#define CONFIG_SPIFFS_PAGE_CHECK 1
|
||||
#define CONFIG_SPIFFS_GC_MAX_RUNS 10
|
||||
#define CONFIG_SPIFFS_PAGE_SIZE 256
|
||||
#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
|
||||
#define CONFIG_SPIFFS_USE_MAGIC 1
|
||||
#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
|
||||
#define CONFIG_SPIFFS_META_LENGTH 4
|
||||
#define CONFIG_SPIFFS_USE_MTIME 1
|
||||
#define CONFIG_WS_TRANSPORT 1
|
||||
#define CONFIG_WS_BUFFER_SIZE 1024
|
||||
#define CONFIG_UNITY_ENABLE_FLOAT 1
|
||||
#define CONFIG_UNITY_ENABLE_DOUBLE 1
|
||||
#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
|
||||
#define CONFIG_VFS_SUPPORT_IO 1
|
||||
#define CONFIG_VFS_SUPPORT_DIR 1
|
||||
#define CONFIG_VFS_SUPPORT_SELECT 1
|
||||
#define CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT 1
|
||||
#define CONFIG_VFS_SUPPORT_TERMIOS 1
|
||||
#define CONFIG_VFS_MAX_COUNT 8
|
||||
#define CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS 1
|
||||
#define CONFIG_WL_SECTOR_SIZE_4096 1
|
||||
#define CONFIG_WL_SECTOR_SIZE 4096
|
||||
#define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
|
||||
#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
|
||||
#define CONFIG_WIFI_PROV_STA_ALL_CHANNEL_SCAN 1
|
||||
|
||||
/* List of deprecated options */
|
||||
#define CONFIG_A2D_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_A2D_TRACE_LEVEL
|
||||
#define CONFIG_A2D_TRACE_LEVEL_WARNING CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_APPL_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_APPL_TRACE_LEVEL
|
||||
#define CONFIG_APPL_TRACE_LEVEL_WARNING CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_AVCT_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_AVCT_TRACE_LEVEL
|
||||
#define CONFIG_AVCT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_AVDT_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_AVDT_TRACE_LEVEL
|
||||
#define CONFIG_AVDT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_AVRC_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_AVRC_TRACE_LEVEL
|
||||
#define CONFIG_AVRC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT
|
||||
#define CONFIG_BLE_SMP_ENABLE CONFIG_BT_BLE_SMP_ENABLE
|
||||
#define CONFIG_BLUEDROID_ENABLED CONFIG_BT_BLUEDROID_ENABLED
|
||||
#define CONFIG_BLUEDROID_PINNED_TO_CORE CONFIG_BT_BLUEDROID_PINNED_TO_CORE
|
||||
#define CONFIG_BLUFI_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_BLUFI_TRACE_LEVEL
|
||||
#define CONFIG_BLUFI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_BNEP_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_BNEP_TRACE_LEVEL
|
||||
#define CONFIG_BROWNOUT_DET CONFIG_ESP_BROWNOUT_DET
|
||||
#define CONFIG_BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
|
||||
#define CONFIG_BROWNOUT_DET_LVL_SEL_7 CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7
|
||||
#define CONFIG_BTC_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_BTC_TRACE_LEVEL
|
||||
#define CONFIG_BTC_TASK_STACK_SIZE CONFIG_BT_BTC_TASK_STACK_SIZE
|
||||
#define CONFIG_BTC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_BTH_LOG_SDP_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_SDP_TRACE_LEVEL
|
||||
#define CONFIG_BTIF_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_BTIF_TRACE_LEVEL
|
||||
#define CONFIG_BTIF_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_BTM_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_BTM_TRACE_LEVEL
|
||||
#define CONFIG_BTM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_BTU_TASK_STACK_SIZE CONFIG_BT_BTU_TASK_STACK_SIZE
|
||||
#define CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_DIS CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_DIS
|
||||
#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
|
||||
#define CONFIG_CONSOLE_UART CONFIG_ESP_CONSOLE_UART
|
||||
#define CONFIG_CONSOLE_UART_BAUDRATE CONFIG_ESP_CONSOLE_UART_BAUDRATE
|
||||
#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
|
||||
#define CONFIG_CONSOLE_UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
|
||||
#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
|
||||
#define CONFIG_ESP32_APPTRACE_LOCK_ENABLE CONFIG_APPTRACE_LOCK_ENABLE
|
||||
#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
|
||||
#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE
|
||||
#define CONFIG_ESP32_PHY_MAX_TX_POWER CONFIG_ESP_PHY_MAX_TX_POWER
|
||||
#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER
|
||||
#define CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT CONFIG_PTHREAD_TASK_CORE_DEFAULT
|
||||
#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
|
||||
#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
|
||||
#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
|
||||
#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED CONFIG_ESP_WIFI_AMPDU_RX_ENABLED
|
||||
#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED CONFIG_ESP_WIFI_AMPDU_TX_ENABLED
|
||||
#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM
|
||||
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER
|
||||
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM
|
||||
#define CONFIG_ESP32_WIFI_ENABLE_WPA3_OWE_STA CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA
|
||||
#define CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE CONFIG_ESP_WIFI_ENABLE_WPA3_SAE
|
||||
#define CONFIG_ESP32_WIFI_IRAM_OPT CONFIG_ESP_WIFI_IRAM_OPT
|
||||
#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM CONFIG_ESP_WIFI_MGMT_SBUF_NUM
|
||||
#define CONFIG_ESP32_WIFI_NVS_ENABLED CONFIG_ESP_WIFI_NVS_ENABLED
|
||||
#define CONFIG_ESP32_WIFI_RX_BA_WIN CONFIG_ESP_WIFI_RX_BA_WIN
|
||||
#define CONFIG_ESP32_WIFI_RX_IRAM_OPT CONFIG_ESP_WIFI_RX_IRAM_OPT
|
||||
#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN
|
||||
#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM
|
||||
#define CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE CONFIG_ESP_COEX_SW_COEXIST_ENABLE
|
||||
#define CONFIG_ESP32_WIFI_TX_BA_WIN CONFIG_ESP_WIFI_TX_BA_WIN
|
||||
#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE CONFIG_ESP_WIFI_TX_BUFFER_TYPE
|
||||
#define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
|
||||
#define CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
|
||||
#define CONFIG_ESP_TASK_WDT CONFIG_ESP_TASK_WDT_INIT
|
||||
#define CONFIG_ESP_WIFI_SW_COEXIST_ENABLE CONFIG_ESP_COEX_SW_COEXIST_ENABLE
|
||||
#define CONFIG_FLASHMODE_DIO CONFIG_ESPTOOLPY_FLASHMODE_DIO
|
||||
#define CONFIG_GAP_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_GAP_TRACE_LEVEL
|
||||
#define CONFIG_GAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
|
||||
#define CONFIG_GATTC_ENABLE CONFIG_BT_GATTC_ENABLE
|
||||
#define CONFIG_GATTS_ENABLE CONFIG_BT_GATTS_ENABLE
|
||||
#define CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO
|
||||
#define CONFIG_GATTS_SEND_SERVICE_CHANGE_MODE CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE
|
||||
#define CONFIG_GATT_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_GATT_TRACE_LEVEL
|
||||
#define CONFIG_GATT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_HCI_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_HCI_TRACE_LEVEL
|
||||
#define CONFIG_HCI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_HID_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_HID_TRACE_LEVEL
|
||||
#define CONFIG_HID_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
|
||||
#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
|
||||
#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
|
||||
#define CONFIG_L2CAP_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_L2CAP_TRACE_LEVEL
|
||||
#define CONFIG_L2CAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_LOG_BOOTLOADER_LEVEL CONFIG_BOOTLOADER_LOG_LEVEL
|
||||
#define CONFIG_LOG_BOOTLOADER_LEVEL_INFO CONFIG_BOOTLOADER_LOG_LEVEL_INFO
|
||||
#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
|
||||
#define CONFIG_MCA_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_MCA_TRACE_LEVEL
|
||||
#define CONFIG_MCA_TRACE_LEVEL_WARNING CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_MONITOR_BAUD CONFIG_ESPTOOLPY_MONITOR_BAUD
|
||||
#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
|
||||
#define CONFIG_OPTIMIZATION_ASSERTION_LEVEL CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL
|
||||
#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
|
||||
#define CONFIG_OSI_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_OSI_TRACE_LEVEL
|
||||
#define CONFIG_OSI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_PAN_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_PAN_TRACE_LEVEL
|
||||
#define CONFIG_PAN_TRACE_LEVEL_WARNING CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
|
||||
#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
|
||||
#define CONFIG_RFCOMM_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL
|
||||
#define CONFIG_RFCOMM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_SDP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
|
||||
#define CONFIG_SMP_ENABLE CONFIG_BT_SMP_ENABLE
|
||||
#define CONFIG_SMP_INITIAL_TRACE_LEVEL CONFIG_BT_LOG_SMP_TRACE_LEVEL
|
||||
#define CONFIG_SMP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING
|
||||
#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
|
||||
#define CONFIG_STACK_CHECK_NONE CONFIG_COMPILER_STACK_CHECK_MODE_NONE
|
||||
#define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
|
||||
#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
|
||||
#define CONFIG_SW_COEXIST_ENABLE CONFIG_ESP_COEX_SW_COEXIST_ENABLE
|
||||
#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
|
||||
#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
|
||||
#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT_INIT
|
||||
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
|
||||
#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
|
||||
#define CONFIG_TCPIP_RECVMBOX_SIZE CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
|
||||
#define CONFIG_TCPIP_TASK_AFFINITY CONFIG_LWIP_TCPIP_TASK_AFFINITY
|
||||
#define CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY
|
||||
#define CONFIG_TCPIP_TASK_STACK_SIZE CONFIG_LWIP_TCPIP_TASK_STACK_SIZE
|
||||
#define CONFIG_TCP_MAXRTX CONFIG_LWIP_TCP_MAXRTX
|
||||
#define CONFIG_TCP_MSL CONFIG_LWIP_TCP_MSL
|
||||
#define CONFIG_TCP_MSS CONFIG_LWIP_TCP_MSS
|
||||
#define CONFIG_TCP_OVERSIZE_MSS CONFIG_LWIP_TCP_OVERSIZE_MSS
|
||||
#define CONFIG_TCP_QUEUE_OOSEQ CONFIG_LWIP_TCP_QUEUE_OOSEQ
|
||||
#define CONFIG_TCP_RECVMBOX_SIZE CONFIG_LWIP_TCP_RECVMBOX_SIZE
|
||||
#define CONFIG_TCP_SND_BUF_DEFAULT CONFIG_LWIP_TCP_SND_BUF_DEFAULT
|
||||
#define CONFIG_TCP_SYNMAXRTX CONFIG_LWIP_TCP_SYNMAXRTX
|
||||
#define CONFIG_TCP_WND_DEFAULT CONFIG_LWIP_TCP_WND_DEFAULT
|
||||
#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
|
||||
#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
|
||||
#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
|
||||
#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
|
||||
#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
|
||||
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
|
||||
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
|
||||
Reference in New Issue
Block a user