mirror of
https://github.com/soypat/lora.git
synced 2026-07-26 07:28:38 +00:00
soypat
350 lines
8.0 KiB
Go
350 lines
8.0 KiB
Go
package sx127x
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import (
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"bytes"
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"errors"
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"fmt"
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"github.com/soypat/lora"
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)
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const (
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// 32MHz frequency for crystal oscillator is typical.
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fXOSC = 32_000_000
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// PLL uses a 19-bit sigma-delta modulator whose frequency resolution, constant over the whole frequency range, is given by
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fSTEP = fXOSC / (1 << 19)
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)
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type irqFlagPos uint8
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const (
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irqPosCADDetected irqFlagPos = iota
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irqPosFHSSChange
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irqPosCADDone
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irqPosTxDone
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irqPosValidHeader
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irqPosPayloadCRC
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irqPosRxDone
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irqPosRxTimeout
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)
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func (pos irqFlagPos) String() (str string) {
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switch pos {
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case irqPosCADDetected:
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str = "CADDetected"
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case irqPosFHSSChange:
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str = "FHSSChange"
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case irqPosCADDone:
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str = "CADDone"
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case irqPosTxDone:
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str = "TxDone"
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case irqPosValidHeader:
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str = "ValidHeader"
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case irqPosPayloadCRC:
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str = "CRCError"
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case irqPosRxDone:
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str = "RxDone"
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case irqPosRxTimeout:
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str = "RxTimeout"
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default:
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str = "UnknownIRQ"
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}
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return str
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}
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func irqFlagsString(irqFlags uint8) (str string) {
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if irqFlags == 0 {
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return "[]"
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}
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str = "["
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for i := irqFlagPos(0); i < 8; i++ {
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if irqFlags&(1<<i) != 0 {
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str += i.String() + ","
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}
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}
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return str + "]"
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}
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const (
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// registers
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regFIFO = 0x00
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regOP_MODE = 0x01
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regFRF_MSB = 0x06
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regFRF_MID = 0x07
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regFRF_LSB = 0x08
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regPA_CONFIG = 0x09
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regPA_RAMP = 0x0a
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regOCP = 0x0b
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regLNA = 0x0c
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regFIFO_ADDR_PTR = 0x0d // FIFO SPI Pointer.
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regFIFO_TX_BASE_ADDR = 0x0e // Start of Tx data. May overlap with Rx data.
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regFIFO_RX_BASE_ADDR = 0x0f // Start of Rx data. May overlap with Tx data.
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regFIFO_RX_CURRENT_ADDR = 0x10 // Start address of last packet received.
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regIRQ_FLAGS_MASK = 0x11
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regIRQ_FLAGS = 0x12
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regRX_NB_BYTES = 0x13 // Number of received bytes.
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regPKT_SNR_VALUE = 0x19
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regPKT_RSSI_VALUE = 0x1a
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regRSSI_VALUE = 0x1b
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regMODEM_CONFIG_1 = 0x1d
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regMODEM_CONFIG_2 = 0x1e
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regSYMB_TIMEOUT_LSB = 0x1f
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regPREAMBLE_MSB = 0x20
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regPREAMBLE_LSB = 0x21
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regPAYLOAD_LENGTH = 0x22
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regMAX_PAYLOAD_LENGTH = 0x23
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regHOP_PERIOD = 0x24
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regFIFO_RX_BYTE_ADDR = 0x25 // Address of last byte received in FIFO.
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regMODEM_CONFIG_3 = 0x26
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regFREQ_ERROR_MSB = 0x28
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regFREQ_ERROR_MID = 0x29
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regFREQ_ERROR_LSB = 0x2a
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regRSSI_WIDEBAND = 0x2c
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regDETECTION_OPTIMIZE = 0x31
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regINVERTIQ = 0x33
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regDETECTION_THRESHOLD = 0x37
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regSYNC_WORD = 0x39
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regINVERTIQ2 = 0x3b
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regDIO_MAPPING_1 = 0x40
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regDIO_MAPPING_2 = 0x41
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regVERSION = 0x42
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regPA_DAC = 0x4d
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// PA config
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paBOOST = 0x80
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expectedVersion = 0x12
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// Bits masking the corresponding IRQs from the radio
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irqRXTOUT_MASK uint8 = 0x80
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irqRXDONE_MASK uint8 = 0x40
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irqCRCERR_MASK uint8 = 0x20
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irqHEADER_MASK uint8 = 0x10
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irqTXDONE_MASK uint8 = 0x08
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irqCDDONE_MASK uint8 = 0x04
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irqFHSSCH_MASK uint8 = 0x02
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irqCDDETD_MASK uint8 = 0x01
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// DIO function mappings D0D1D2D3
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mapDIO0_RXDONE uint8 = 0x00 // 00------ LoRa
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mapDIO0_TXDONE uint8 = 0x40 // 01------ LoRa
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mapDIO1_RXTOUT uint8 = 0x00 // --00---- LoRa
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mapDIO1_NOP uint8 = 0x30 // --11---- LoRa
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mapDIO2_NOP uint8 = 0xC0 // ----11-- LoRa
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// SX127X_PAYLOAD_LENGTH uint8 = 0x40
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// Low Noise Amp
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lnaMAX_GAIN uint8 = 0b001
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lnaOFF_GAIN uint8 = 0b111
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lnaLOW_GAIN uint8 = 0b110
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// Bandwidth
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bw7_8 uint8 = 0x00
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bw10_4 uint8 = 0x01
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bw15_6 uint8 = 0x02
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bw20_8 uint8 = 0x03
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bw31_25 uint8 = 0x04
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bw41_7 uint8 = 0x05
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bw62_5 uint8 = 0x06
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bw125_0 uint8 = 0x07
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bw250_0 uint8 = 0x08
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bw500_0 uint8 = 0x09
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// Automatic gain control
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agcAUTO_OFF uint8 = 0x00
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agcAUTO_ON uint8 = 0x01
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publicSyncword = 0x34
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privateSyncword = 0x14
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)
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// FSK/OOK registers.
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const (
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regImageCal = 0x3b
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regTemp = 0x3c
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regRXConfig = 0x0D
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regRSSIConfig = 0x0E
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regAFCFEI = 0x1a
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regPreambleDetect = 0x1f
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regOsc = 0x24
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regSyncConfig = 0x27
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regSyncValue1 = 0x28
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regSyncValue2 = 0x29
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regSyncValue3 = 0x2A
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regSyncValue4 = 0x2B
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regSyncValue5 = 0x2C
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regSyncValue6 = 0x2D
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regSyncValue7 = 0x2E
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regSyncValue8 = 0x2F
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regPacketConfig1 = 0x30
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regFifoThresh = 0x35
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// Values that would be read from regTemp:
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lowTempVal uint8 = 64 // -40 C
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medTempVal uint8 = 245 // +25 C
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hiTempVal uint8 = 181 // +85 C
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)
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var bandwidths = [bw500_0 + 1]lora.Frequency{
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bw7_8: 7.8e3 * lora.Hertz,
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bw10_4: 10.4e3 * lora.Hertz,
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bw15_6: 15.6e3 * lora.Hertz,
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bw20_8: 20.8e3 * lora.Hertz,
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bw31_25: 31.25e3 * lora.Hertz,
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bw41_7: 41.7e3 * lora.Hertz,
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bw62_5: 62.5e3 * lora.Hertz,
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bw125_0: 125e3 * lora.Hertz,
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bw250_0: 250e3 * lora.Hertz,
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bw500_0: 500e3 * lora.Hertz,
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}
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func bwReg(bandwidth lora.Frequency) (value byte) {
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value = bw7_8
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for i := byte(len(bandwidths) - 1); i >= 0; i-- {
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if bandwidth >= bandwidths[i] {
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value = i
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break
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}
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}
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return value
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}
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func reg2Bw(bwByte byte) (value lora.Frequency) {
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if bwByte > byte(len(bandwidths)-1) {
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return 0
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}
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return bandwidths[bwByte]
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}
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// Operation modes.
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const (
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opmMASK uint8 = 0x07
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opmSLEEP uint8 = 0x00
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opmSTANDBY uint8 = 0x01
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opmFSTX uint8 = 0x02
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opmTX uint8 = 0x03
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opmFSRX uint8 = 0x04
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opmRX uint8 = 0x05
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opmRX_SINGLE uint8 = 0x06
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opmCAD uint8 = 0x07
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opmLORA uint8 = 0x80
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)
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// OpMode represents the available operation modes of the SX127x devices.
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type OpMode uint8
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// LoRa Operation modes.
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const (
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// Sleep mode will sleep goroutine for 15ms on SetOpmode call.
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OpSleep OpMode = iota
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// Standby mode is the default mode when waiting to operate.
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OpStandby
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// Frequency synthesis TX (FSTX)
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OpFSTx
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// Transmit (TX)
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OpTx
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// Frequency synthesis RX (FSRX)
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OpFSRx
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// Receive continuous (RXCONTINUOUS)
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OpRx
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// receive single (RXSINGLE)
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OpRxSingle
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// Channel activity detection (CAD)
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OpCAD
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opLoRaBit = OpMode(1 << 7)
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)
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func (op OpMode) String() (s string) {
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op = op &^ opLoRaBit
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switch op {
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case OpSleep:
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s = "sleep"
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case OpStandby:
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s = "standby"
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case OpFSTx:
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s = "fstx"
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case OpTx:
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s = "tx"
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case OpFSRx:
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s = "fsrx"
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case OpRx:
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s = "rx"
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case OpRxSingle:
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s = "rx-single"
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case OpCAD:
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s = "cad"
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default:
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s = "unknown"
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}
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return s
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}
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func (d *DeviceLoRa) statusString() string {
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irq, _ := d.read8(regIRQ_FLAGS)
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opmode, err := d.GetOpMode()
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return fmt.Sprintf("opmode: %s; operr=%v; irq: %08b=%s;%s", opmode.String(), err, irq, irqFlagsString(irq), d.debugRegString())
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}
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func (d *DeviceLoRa) wrapErr(err error) error {
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if err == nil {
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return nil
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}
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return fmt.Errorf("stat=%s: %w", d.statusString(), err)
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}
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func (d *DeviceLoRa) debugForEachTouchedReg(fn func(addr, mask, read, write uint8)) {
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for addr := uint8(0); addr < debugBufSize; addr++ {
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mask := d.debugMask[addr]
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read := d.debugRead[addr]
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write := d.debugWrite[addr]
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fn(addr, mask, read, write)
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}
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}
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func (d *DeviceLoRa) debugRegString() string {
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var buf bytes.Buffer
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d.debugForEachTouchedReg(func(addr, mask, read, write uint8) {
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rm := read & mask
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wm := write & mask
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if rm == wm {
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return
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}
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regstr := regstr(addr).String()
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fmt.Fprintf(&buf, "0x%02X(%s): mask=%08b, read=0x%0x, write=0x%0x\n", addr, regstr, mask, read, write)
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})
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return buf.String()
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}
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func (d *DeviceLoRa) FullStatus(fifo, registers []byte) (err error) {
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if len(fifo) < 256 || len(registers) < 256 {
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return errors.New("fifo and registers must be at least 256 bytes long")
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}
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err = d.SetOpMode(OpStandby)
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if err != nil {
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return err
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}
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for addr := uint8(1); addr <= 0x4d; addr++ {
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if !regstr(addr).valid() {
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registers[addr] = 0
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continue // Not a readable register.
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}
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registers[addr], err = d.read8(addr)
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if err != nil {
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return err
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}
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}
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// Read full contents of FIFO.
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err = d.Write8(regFIFO_ADDR_PTR, 0)
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if err != nil {
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return err
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}
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for addr := uint8(0); addr < 255; addr++ {
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fifo[addr], err = d.read8(0)
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if err != nil {
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return err
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}
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}
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return nil
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}
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