mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2026-08-21 06:59:02 +00:00
Pezsma
9ab367f2e0
* Implement antenna bias control for Praline and update GPIO configurations * Add GPIO power management functions and update board initialization for Praline * Refactor power management functions for Praline and update GPIO configurations * Update GPIO configurations for Praline and enable power control pins. AA_EN enabled * Refactor GPIO configuration for Praline: update array size definitions and clean up comments * Add P1 and P2 control functions for PRALINE * Introduced P1_Function and P2_Function enums in ClockManager to manage multiplexer control. * mplemented set_p1_control and set_p2_control methods for configuring P1 and P2 control pins based on specified functions. * Updated clock_manager.hpp and clock_manager.cpp to include new functionality. * Modified MAX2837 and MAX2839 initialization to conditionally configure GPIO based on PRALINE. * Adjusted RFFC507x and RFFC507x_SPI initialization to include GPIO setup for PRALINE. - Refactored RF path initialization to remove unnecessary GPIO setup. - Updated board configuration for PRALINE to reflect new GPIO settings and pin configurations. - Cleaned up FPGA bridge code by removing unused pin configuration functions. - Adjusted SCU array size in pal_lld.h for PRALINE. - Enhanced hackrf_gpio.hpp to define multiplexer control pins for PRALINE. - Modified LED setup to accommodate active-low configuration for PRALINE. * Refactor GPIO and power control functions - Removed unused power control function declarations from board.h. - Enhanced gpio.hpp with new pin setup functions and GPIO control structures for PRALINE. - Consolidated multiplexer control pin definitions into gpio_control namespace. - Moved power control function implementations to gpio.cpp, including detailed VAA power management logic. - Updated power control functions to handle both PRALINE and HackRF R9 configurations. - Cleaned up hackrf_gpio.hpp by removing redundant multiplexer control definitions. * Refactor GPIO control for PRALINE: update MAX2831 and RFFC507x configurations, add new GPIO mappings * Refactor GPIO configurations for PRALINE: update anti-aliasing filter pin mapping, enhance LED setup logic, and add placeholder GPIO entries. * Refactor GPIO configurations for PRALINE: update LED mappings and remove unused anti-aliasing filter GPIO entry.
183 lines
6.9 KiB
C++
183 lines
6.9 KiB
C++
/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of PortaPack.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __HACKRF_GPIO_H__
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#define __HACKRF_GPIO_H__
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#include "pins.hpp"
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#include "led.hpp"
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#include <array>
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using namespace lpc43xx;
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namespace hackrf {
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namespace one {
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/* GPIO */
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constexpr GPIO gpio_led_usb = gpio[GPIO2_1];
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constexpr GPIO gpio_led_rx = gpio[GPIO2_2];
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constexpr GPIO gpio_led_tx = gpio[GPIO2_8];
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constexpr GPIO gpio_og_1v8_enable = gpio[GPIO3_6];
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constexpr GPIO gpio_r9_1v8_enable = gpio[GPIO2_9];
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constexpr GPIO gpio_vregmode = gpio[GPIO3_7];
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constexpr GPIO gpio_rx_mix_bp = gpio[GPIO2_12];
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constexpr GPIO gpio_tx_mix_bp = gpio[GPIO2_11];
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#ifdef PRALINE
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constexpr GPIO gpio_mix_bypass = gpio[GPIO3_2]; // P6_3: PRALINE RF path mixer bypass inverted
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constexpr GPIO gpio_mix_en_n_r1_0 = gpio[GPIO5_6]; // P2_6: R1.0 board mixer bypass
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#else
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constexpr GPIO gpio_mix_bypass = gpio[GPIO5_16];
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#endif
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constexpr GPIO gpio_not_mix_bypass = gpio[GPIO1_0];
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constexpr GPIO gpio_og_rx = gpio[GPIO5_5];
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constexpr GPIO gpio_og_tx = gpio[GPIO5_15];
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constexpr GPIO gpio_r9_rx = gpio[GPIO0_7];
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constexpr GPIO gpio_lp = gpio[GPIO2_10];
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constexpr GPIO gpio_hp = gpio[GPIO2_0];
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constexpr GPIO gpio_rx_amp = gpio[GPIO1_11];
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constexpr GPIO gpio_tx_amp = gpio[GPIO2_15];
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constexpr GPIO gpio_amp_bypass = gpio[GPIO0_14];
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constexpr GPIO gpio_not_tx_amp_pwr = gpio[GPIO3_5];
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#ifdef PRALINE
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// PRALINE: GPIO2[13] is SPI CS only, FPGA controls ENX/RESETX
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constexpr GPIO gpio_rffc5072_select = gpio[GPIO2_13]; // P5_4: SPI CS (ENX)
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constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14]; // P5_5: LPC43xx controls directly
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#else
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constexpr GPIO gpio_rffc5072_select = gpio[GPIO2_13];
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constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14];
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constexpr GPIO gpio_not_rx_amp_pwr = gpio[GPIO1_12];
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#endif
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#ifdef PRALINE
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constexpr GPIO gpio_rffc5072_clock = gpio[GPIO5_18];
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constexpr GPIO gpio_rffc5072_data = gpio[GPIO4_14];
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#else
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constexpr GPIO gpio_rffc5072_clock = gpio[GPIO5_6];
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constexpr GPIO gpio_rffc5072_data = gpio[GPIO3_3];
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#endif
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#ifdef PRALINE
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constexpr GPIO gpio_max283x_select = gpio[GPIO6_28];
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#else
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constexpr GPIO gpio_max283x_select = gpio[GPIO0_15];
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#endif
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#ifdef PRALINE
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// PRALINE uses MAX2831 transceiver with different control pins
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constexpr GPIO gpio_max283x_enable = gpio[GPIO7_1]; // MAX2831 ENABLE (PE_1)
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constexpr GPIO gpio_max2831_enable = gpio[GPIO7_1]; // Alias
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constexpr GPIO gpio_max2831_rx_enable = gpio[GPIO7_2]; // MAX2831 RX_ENABLE (PE_2)
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constexpr GPIO gpio_max2831_rxhp = gpio[GPIO6_29]; // MAX2831 RXHP (PD_15)
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constexpr GPIO gpio_max2831_ld = gpio[GPIO4_11]; // MAX2831 Lock Detect (P9_6)
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// Legacy aliases for code compatibility
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constexpr GPIO gpio_max2837_rxenable = gpio[GPIO7_2];
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constexpr GPIO gpio_max2837_txenable = gpio[GPIO7_2]; // MAX2831 uses single RX/TX control
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constexpr GPIO gpio_max2839_rxtx = gpio[GPIO7_2];
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#else
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constexpr GPIO gpio_max283x_enable = gpio[GPIO2_6];
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constexpr GPIO gpio_max2837_rxenable = gpio[GPIO2_5];
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constexpr GPIO gpio_max2837_txenable = gpio[GPIO2_4];
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constexpr GPIO gpio_max2839_rxtx = gpio[GPIO2_5];
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#endif
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#ifdef PRALINE
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constexpr GPIO gpio_max5864_select = gpio[GPIO6_30]; // PD_16: PRALINE MAX5864 CS
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constexpr GPIO gpio_fpga_select = gpio[GPIO2_10]; // FPGA SPI CS (P5_1)
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#else
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constexpr GPIO gpio_max5864_select = gpio[GPIO2_7];
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#endif
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constexpr GPIO gpio_q_invert = gpio[GPIO0_13];
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#ifdef PRALINE
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// PRALINE power control
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constexpr GPIO gpio_vaa_disable = gpio[GPIO4_1]; // VAA disable (P8_1)
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constexpr GPIO gpio_1v2_enable = gpio[GPIO4_7]; // 1V2 enable (P8_7)
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constexpr GPIO gpio_3v3aux_disable = gpio[GPIO5_15]; // 3V3 aux disable (P6_7)
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constexpr GPIO gpio_3v3aux_oc = gpio[GPIO1_11]; // 3.3V aux overcurrent input (P2_11)
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constexpr GPIO gpio_vbus_enable = gpio[GPIO4_4]; // VBUS_IN_EN P8_4 ->LOW
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constexpr GPIO gpio_vin_enable = gpio[GPIO4_5]; // VIN_IN_EN P8_5 ->HIGH
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// PRALINE RF path control
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constexpr GPIO gpio_tx_enable = gpio[GPIO3_4]; // TX enable (P6_5)
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// constexpr GPIO gpio_mix_enable_n = gpio[GPIO3_2]; // Mixer enable inverted (P6_3)
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constexpr GPIO gpio_lpf_enable = gpio[GPIO4_8]; // LPF enable (PA_1)
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constexpr GPIO gpio_rf_amp_enable = gpio[GPIO4_9]; // RF amp enable (PA_2)
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constexpr GPIO gpio_ant_bias_disable = gpio[GPIO1_12]; // Antenna bias disable (P2_12)
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constexpr GPIO gpio_bias_oc = gpio[GPIO3_7]; // Bias tee overcurrent input (P6_11)
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// PRALINE mixer lock detect (gpio_max2831_ld defined above at line 93)
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constexpr GPIO gpio_rffc5072_ld = gpio[GPIO6_25]; // Mixer lock detect (PD_11)
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// PRALINE LED4
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constexpr GPIO gpio_led4 = gpio[GPIO4_6]; // LED4 (P8_6)
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// PRALINE dual port control
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constexpr GPIO gpio_p1_ctrl0 = gpio[GPIO0_14]; // P1 control 0 (P2_10)
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constexpr GPIO gpio_p1_ctrl1 = gpio[GPIO5_16]; // P1 control 1 (P6_8)
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constexpr GPIO gpio_p1_ctrl2 = gpio[GPIO3_5]; // P1 control 2 (P6_9)
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constexpr GPIO gpio_p2_ctrl0 = gpio[GPIO7_3]; // P2 control 0 (PE_3)
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constexpr GPIO gpio_p2_ctrl1 = gpio[GPIO7_4]; // P2 control 1 (PE_4)
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constexpr GPIO gpio_clkin_ctrl = gpio[GPIO0_15]; // CLKIN control (P1_20)
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// PRALINE trigger/sync I/O
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constexpr GPIO gpio_trigger_in = gpio[GPIO6_26]; // Trigger input (PD_12)
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constexpr GPIO gpio_trigger_out = gpio[GPIO5_6]; // Trigger output (P2_6)
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constexpr GPIO gpio_pps_out = gpio[GPIO5_5]; // PPS output (P2_5)
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#endif
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#ifdef PRALINE
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/* PRALINE has no HackRF CPLD. These pins are used for RFFC5072 and TX_EN instead.
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* Dummy assignments here allow cpld_update.cpp to compile; the functions
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* that use them are never called on PRALINE. */
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constexpr GPIO gpio_cpld_tdo = gpio[GPIO3_0]; // dummy: reuse TCK pin
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constexpr GPIO gpio_cpld_tms = gpio[GPIO3_1]; // dummy: reuse TDI pin
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#else
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constexpr GPIO gpio_cpld_tdo = gpio[GPIO5_18];
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constexpr GPIO gpio_cpld_tms = gpio[GPIO3_4];
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#endif
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constexpr GPIO gpio_cpld_tck = gpio[GPIO3_0];
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constexpr GPIO gpio_cpld_tdi = gpio[GPIO3_1];
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constexpr GPIO gpio_r9_clkin_en = gpio[GPIO5_15];
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constexpr GPIO gpio_r9_clkout_en = gpio[GPIO0_9];
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constexpr GPIO gpio_r9_mcu_clk_en = gpio[GPIO0_8];
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constexpr GPIO gpio_r9_not_ant_pwr = gpio[GPIO2_4];
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/* LEDs */
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constexpr LED led_usb{gpio_led_usb};
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constexpr LED led_rx{gpio_led_rx};
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constexpr LED led_tx{gpio_led_tx};
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} /* namespace one */
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} /* namespace hackrf */
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#endif /*__HACKRF_GPIO_H__*/
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