mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2026-08-22 07:29:03 +00:00
gullradriel
8f5b25b10d
* fix clock init and add mayhem tx capacity * aligned external clock and RX config * fix(clock): cap TX interpolation to x16 to prevent doubled waveform speed The TX gateware only implements interpolation factors x1..x16 (tx_intrp 0..4), but the rate search could select n==5 (x32) for very low TX sample rates. That left the AFE/CLK0/CLK1 running at the x32 rate while the FPGA only interpolated by x16, clocking the TX datapath at twice the gateware output rate. Cap afe_rate and _resampling_n to the x16 limit in TX so the clocks stay aligned with the interpolation setting. * fix(praline): source PLL1 from 40MHz GP_CLKIN instead of 12MHz XTAL For the intermediate 90-110MHz PLL1 stepping stage, source PLL1 from GP_CLKIN (Si5351 CLK2/MCU_CLK at 40MHz) giving N=2, M=10, Fclk=100MHz, rather than the on-chip 12MHz XTAL bootstrap path. This matches the non-PRALINE path. Remove the dead commented-out XTAL enable/PLL code. * docs(fpga_bridge): correct register 0x03 description for PRALINE gateware Register 0x03 is RX_DIGITAL_GAIN in RX and TX_NCO_CTRL in TX, not RX_PSTEP. * Fix fpga_tx_set_nco_enable to use FPGA_REG3_TX_NCO_CTRL (0x03)
90 lines
2.4 KiB
C++
90 lines
2.4 KiB
C++
/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of PortaPack.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __RF_PATH_H__
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#define __RF_PATH_H__
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#include "utility.hpp"
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#include <cstdint>
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namespace rf {
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using Frequency = int64_t;
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using FrequencyRange = range_t<Frequency>;
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enum class Direction {
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/* Zero-based, used as index into table */
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Receive = 0,
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Transmit = 1,
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};
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namespace path {
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#ifdef PRALINE
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/* PRALINE: MAX2831 direct path is 2320-2740 MHz */
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constexpr FrequencyRange band_low{0, 2320'000'000};
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constexpr FrequencyRange band_high{2740'000'000, 7250'000'000};
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constexpr FrequencyRange band_mid{band_low.maximum, band_high.minimum};
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#else
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/* HackRF One: Original band boundaries */
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constexpr FrequencyRange band_low{0, 2170'000'000};
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constexpr FrequencyRange band_high{2740'000'000, 7250'000'000};
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constexpr FrequencyRange band_mid{band_low.maximum, band_high.minimum};
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#endif
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enum class Band {
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/* Zero-based, used as index into frequency_bands table */
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Low = 0,
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Mid = 1,
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High = 2,
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};
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class Path {
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public:
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void init();
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void set_direction(const Direction direction);
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void set_band(const Band band);
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void set_rf_amp(const bool rf_amp);
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void set_antenna_bias(const bool antenna_bias);
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Band get_band() const { return _band; } //_band is used solely for debugging purposes.
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private:
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Direction direction{Direction::Receive};
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Band band{Band::Mid};
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bool rf_amp{false};
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bool antenna_bias{false};
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void update();
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Band _band{Band::Mid}; //_band is solely used of debugging purposes
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};
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} // namespace path
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constexpr FrequencyRange tuning_range{path::band_low.minimum, path::band_high.maximum};
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} // namespace rf
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#endif /*__RF_PATH_H__*/
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