From f4744e651bff8da55f23a8640355d2a9c7ee1c24 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Mon, 17 Jul 2017 16:50:26 -0700 Subject: [PATCH] CPLD: Match 20150901 constraints to newer project. --- hardware/portapack_h1/cpld/20150901/portapack_h1_cpld.sdc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hardware/portapack_h1/cpld/20150901/portapack_h1_cpld.sdc b/hardware/portapack_h1/cpld/20150901/portapack_h1_cpld.sdc index 9c05af2ae..7417b9444 100644 --- a/hardware/portapack_h1/cpld/20150901/portapack_h1_cpld.sdc +++ b/hardware/portapack_h1/cpld/20150901/portapack_h1_cpld.sdc @@ -45,7 +45,7 @@ set lcd_data_wr_hold 10.0 # Create Clock #************************************************************** -create_clock -name {MCU_STROBE} -period 66.000 -waveform { 0.000 33.000 } [get_ports {MCU_STROBE}] +create_clock -name {MCU_LCD_WR} -period 66.000 -waveform { 0.000 33.000 } [get_ports {MCU_LCD_WR}] #create_clock -name strobe_virt -period 66.000 #************************************************************** @@ -88,8 +88,8 @@ create_clock -name {MCU_STROBE} -period 66.000 -waveform { 0.000 33.000 } [get_p # Set False Path #************************************************************** -set_false_path -from [get_clocks {MCU_STROBE}] -to [get_ports {TP_D TP_L TP_R TP_U}] -set_false_path -from [get_ports {SW_D SW_L SW_R SW_ROT_A SW_ROT_B SW_SEL SW_U}] -to [get_ports {MCU_D[*]}] +#set_false_path -from [get_clocks {MCU_IO_STBX}] -to [get_ports {TP_D TP_L TP_R TP_U}] +#set_false_path -from [get_ports {SW_D SW_L SW_R SW_ROT_A SW_ROT_B SW_SEL SW_U}] -to [get_ports {MCU_D[*]}] #**************************************************************