mirror of
https://github.com/portapack-mayhem/mayhem-firmware.git
synced 2026-09-10 08:39:29 +00:00
Add praline gpio (#3218)
* Implement antenna bias control for Praline and update GPIO configurations * Add GPIO power management functions and update board initialization for Praline * Refactor power management functions for Praline and update GPIO configurations * Update GPIO configurations for Praline and enable power control pins. AA_EN enabled * Refactor GPIO configuration for Praline: update array size definitions and clean up comments * Add P1 and P2 control functions for PRALINE * Introduced P1_Function and P2_Function enums in ClockManager to manage multiplexer control. * mplemented set_p1_control and set_p2_control methods for configuring P1 and P2 control pins based on specified functions. * Updated clock_manager.hpp and clock_manager.cpp to include new functionality. * Modified MAX2837 and MAX2839 initialization to conditionally configure GPIO based on PRALINE. * Adjusted RFFC507x and RFFC507x_SPI initialization to include GPIO setup for PRALINE. - Refactored RF path initialization to remove unnecessary GPIO setup. - Updated board configuration for PRALINE to reflect new GPIO settings and pin configurations. - Cleaned up FPGA bridge code by removing unused pin configuration functions. - Adjusted SCU array size in pal_lld.h for PRALINE. - Enhanced hackrf_gpio.hpp to define multiplexer control pins for PRALINE. - Modified LED setup to accommodate active-low configuration for PRALINE. * Refactor GPIO and power control functions - Removed unused power control function declarations from board.h. - Enhanced gpio.hpp with new pin setup functions and GPIO control structures for PRALINE. - Consolidated multiplexer control pin definitions into gpio_control namespace. - Moved power control function implementations to gpio.cpp, including detailed VAA power management logic. - Updated power control functions to handle both PRALINE and HackRF R9 configurations. - Cleaned up hackrf_gpio.hpp by removing redundant multiplexer control definitions. * Refactor GPIO control for PRALINE: update MAX2831 and RFFC507x configurations, add new GPIO mappings * Refactor GPIO configurations for PRALINE: update anti-aliasing filter pin mapping, enhance LED setup logic, and add placeholder GPIO entries. * Refactor GPIO configurations for PRALINE: update LED mappings and remove unused anti-aliasing filter GPIO entry.
This commit is contained in:
Pezsma
GitHub
@@ -0,0 +1,184 @@
|
||||
/*
|
||||
* Copyright (C) 2026 Pezsma
|
||||
*
|
||||
* This file is part of PortaPack.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "gpio.hpp"
|
||||
|
||||
#include "platform.hpp"
|
||||
|
||||
namespace power_control {
|
||||
|
||||
/* VAA powers:
|
||||
* MAX5864 analog section.
|
||||
* MAX2837 registers and other functions.
|
||||
* RFFC5072 analog section.
|
||||
*
|
||||
* Beware that power applied to pins of the MAX2837 may
|
||||
* show up on VAA and start powering other components on the
|
||||
* VAA net. So turn on VAA before driving pins from MCU to
|
||||
* MAX2837.
|
||||
*/
|
||||
|
||||
void vaa_power_on(void) {
|
||||
/* Very twitchy process for powering up VAA without glitching the 3.3V rail,
|
||||
* which can send the microcontroller into reset.
|
||||
*/
|
||||
#ifdef PRALINE
|
||||
/* P8_1 (GPIO4[1]) does not have MOTOCONPWM hardware routing.
|
||||
* Using software bit-banging (pseudo-PWM) for VAA soft-start.
|
||||
* VAA is active LOW (0 = ON).
|
||||
*/
|
||||
|
||||
/* Software soft-start loop to prevent brown-out */
|
||||
for (uint32_t i = 0; i < 1000; i++) {
|
||||
LPC_GPIO->W4[1] = 0; /* Turn ON briefly */
|
||||
LPC_GPIO->W4[1] = 1; /* Turn OFF briefly */
|
||||
}
|
||||
|
||||
/* Latch VAA to ON state (Active LOW) */
|
||||
LPC_GPIO->CLR[4] = (1 << 1);
|
||||
|
||||
#else
|
||||
if (hackrf_r9) {
|
||||
/*
|
||||
* There is enough VCC->VAA leakage prior to VAA activation from IO pins on
|
||||
* HackRF One r9 that slowing down activation like this isn't necessary, but
|
||||
* we do it just in case a different start-up sequence in the future results
|
||||
* in less leakage.
|
||||
*/
|
||||
setup_pin(pin_setup_vaa_enablex_gpio_r9); // P6_10 GPIO3[ 6]: !VAA_ENABLE, 10K PU
|
||||
for (uint32_t i = 0; i < 1000; i++) {
|
||||
LPC_GPIO->W3[6] = 1;
|
||||
LPC_GPIO->W3[6] = 0;
|
||||
}
|
||||
} else {
|
||||
/* Configure and enable MOTOCONPWM peripheral clocks.
|
||||
* Assume IDIVC is running the post-bootloader configuration, outputting 96MHz derived from PLL1.
|
||||
*/
|
||||
base_clock_enable(&motocon_pwm_resources.base);
|
||||
branch_clock_enable(&motocon_pwm_resources.branch);
|
||||
peripheral_reset(&motocon_pwm_resources.reset);
|
||||
|
||||
/* Combination of pulse duration and duty cycle was arrived at empirically, to keep supply glitching
|
||||
* to +/- 0.15V.
|
||||
*/
|
||||
const uint32_t cycle_period = 256;
|
||||
uint32_t enable_period = 2;
|
||||
LPC_MCPWM->TC2 = 0;
|
||||
LPC_MCPWM->MAT2 = cycle_period - enable_period;
|
||||
LPC_MCPWM->LIM2 = cycle_period;
|
||||
|
||||
/* Switch !VAA_ENABLE pin from GPIO to MOTOCONPWM peripheral output, now that the peripheral is configured. */
|
||||
setup_pin(pin_setup_vaa_enablex_pwm); // P5_0 /GPIO2[ 9]/MCOB2: !VAA_ENABLE, 10K PU
|
||||
|
||||
/* Start the PWM operation. */
|
||||
LPC_MCPWM->CON_SET = (1 << 16);
|
||||
|
||||
/* Wait until VAA rises to approximately 90% of final voltage. */
|
||||
/* Timing assumes we're running immediately after the bootloader: 96 MHz from IRC+PLL1
|
||||
*/
|
||||
while (enable_period < cycle_period) {
|
||||
{
|
||||
volatile uint32_t delay = 2000;
|
||||
while (delay--);
|
||||
}
|
||||
enable_period <<= 1;
|
||||
LPC_MCPWM->MAT2 = cycle_period - enable_period;
|
||||
}
|
||||
|
||||
/* Hold !VAA_ENABLE active using a GPIO, so we can reclaim and shut down the MOTOCONPWM peripheral. */
|
||||
LPC_GPIO->CLR[2] = (1 << 9); // !VAA_ENABLE
|
||||
LPC_GPIO->DIR[2] |= (1 << 9);
|
||||
setup_pin(pin_setup_vaa_enablex_gpio_og); // P5_0 /GPIO2[ 9]/MCOB2: !VAA_ENABLE, 10K PU
|
||||
|
||||
peripheral_reset(&motocon_pwm_resources.reset);
|
||||
branch_clock_disable(&motocon_pwm_resources.branch);
|
||||
base_clock_disable(&motocon_pwm_resources.base);
|
||||
}
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
void vaa_power_off(void) {
|
||||
/* TODO: There's a lot of other stuff that must be done to prevent
|
||||
* leakage from +3V3 into VAA.
|
||||
*/
|
||||
#ifdef PRALINE
|
||||
/* Safe state: OFF (VAA RF is active LOW, so Set = OFF) */
|
||||
LPC_GPIO->SET[4] = (1 << 1);
|
||||
|
||||
/* Turn OFF LED3 (TX) */
|
||||
LPC_GPIO->SET[2] = (1 << 8);
|
||||
|
||||
#else
|
||||
if (hackrf_r9) {
|
||||
LPC_GPIO->W3[6] = 1; // Turn OFF VAA for r9 P6_10
|
||||
} else {
|
||||
LPC_GPIO->W2[9] = 1; // Turn OFF VAA for OG P5_0
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef PRALINE
|
||||
|
||||
void aux_power_on(void) {
|
||||
// 3.3V Aux - P6_7 = GPIO5[15], Active LOW (Clear = ON)
|
||||
LPC_GPIO->CLR[5] = (1 << 15);
|
||||
}
|
||||
|
||||
void aux_power_off(void) {
|
||||
// 3.3V Aux - P6_7 = GPIO5[15], Active LOW (Set = OFF)
|
||||
LPC_GPIO->SET[5] = (1 << 15);
|
||||
}
|
||||
|
||||
#endif /* PRALINE */
|
||||
|
||||
void core_power_on(void) { // Core power enable
|
||||
#ifdef PRALINE
|
||||
// 1.2V FPGA - P8_7 = GPIO4[7], Active HIGH (Set = ON)
|
||||
LPC_GPIO->SET[4] = (1 << 7);
|
||||
|
||||
#else
|
||||
if (hackrf_r9) {
|
||||
// P5_0 (GPIO2[9]) is the EN1V8 pin
|
||||
LPC_GPIO->SET[2] = (1 << 9);
|
||||
} else {
|
||||
// On older OG HackRF boards, P6_10 (GPIO3[6]) is the EN1V8 pin
|
||||
LPC_GPIO->SET[3] = (1 << 6);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void core_power_off(void) { // Core power disable
|
||||
#ifdef PRALINE
|
||||
// 1.2V FPGA - P8_7 = GPIO4[7], Active HIGH (Clear = OFF) */
|
||||
LPC_GPIO->CLR[4] = (1 << 7);
|
||||
|
||||
#else
|
||||
if (hackrf_r9) {
|
||||
// P5_0 (GPIO2[9]) is the EN1V8 pin
|
||||
LPC_GPIO->CLR[2] = (1 << 9);
|
||||
} else {
|
||||
// On older OG HackRF boards, P6_10 (GPIO3[6]) is the EN1V8 pin
|
||||
LPC_GPIO->CLR[3] = (1 << 6);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
} // namespace power_control
|
||||
@@ -22,10 +22,13 @@
|
||||
#ifndef __GPIO_H__
|
||||
#define __GPIO_H__
|
||||
|
||||
#include <array>
|
||||
#include <cstddef>
|
||||
#include <cstdint>
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
#include "pal.h"
|
||||
|
||||
struct PinConfig {
|
||||
const uint32_t mode;
|
||||
@@ -280,4 +283,109 @@ struct GPIO {
|
||||
const uint16_t _gpio_mode;
|
||||
};
|
||||
|
||||
constexpr uint32_t boot_bit(const GPIO& pin, bool state) {
|
||||
return (state ? 1UL : 0UL) << pin.pad();
|
||||
}
|
||||
|
||||
inline void setup_pin(const scu_setup_t& pin_setup) {
|
||||
LPC_SCU->SFSP[pin_setup.port][pin_setup.pin] = pin_setup.config;
|
||||
}
|
||||
|
||||
template <size_t N>
|
||||
inline void setup_gpios(const std::array<gpio_setup_t, N>& pins_setup) {
|
||||
for (size_t i = 0; i < N; i++) {
|
||||
LPC_GPIO->PIN[i] |= pins_setup[i].data;
|
||||
LPC_GPIO->DIR[i] |= pins_setup[i].dir;
|
||||
}
|
||||
}
|
||||
|
||||
template <size_t N>
|
||||
inline void setup_pins(const std::array<scu_setup_t, N>& pins_setup) {
|
||||
for (const auto& pin_setup : pins_setup) {
|
||||
setup_pin(pin_setup);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef PRALINE
|
||||
namespace gpio_control {
|
||||
|
||||
struct PinMap {
|
||||
uint8_t scu_port;
|
||||
uint8_t scu_pin;
|
||||
uint8_t gpio_port;
|
||||
uint8_t gpio_pad;
|
||||
};
|
||||
|
||||
constexpr PinMap map_p1_ctrl0{2, 10, 0, 14}; // SCU: 2, 10 | GPIO: 0, 14
|
||||
constexpr PinMap map_p1_ctrl1{6, 8, 5, 16};
|
||||
constexpr PinMap map_p1_ctrl2{6, 9, 3, 5};
|
||||
constexpr PinMap map_p2_ctrl0{8, 3, 7, 3};
|
||||
constexpr PinMap map_p2_ctrl1{8, 4, 7, 4};
|
||||
constexpr PinMap map_trigger_out{2, 6, 5, 6};
|
||||
constexpr PinMap map_trigger_in{13, 12, 6, 26};
|
||||
|
||||
constexpr PinMap map_rf5072_mix_en{9, 0, 4, 12};
|
||||
|
||||
constexpr PinMap map_aa_en{1, 14, 1, 7}; // Anti-Aliasing filter
|
||||
|
||||
// P1 Multiplexer control pins
|
||||
constexpr Pin pin_p1_ctrl0{map_p1_ctrl0.scu_port, map_p1_ctrl0.scu_pin}; // SCU: P2_10
|
||||
constexpr GPIO p1_ctrl0{pin_p1_ctrl0, map_p1_ctrl0.gpio_port, map_p1_ctrl0.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[0]14
|
||||
|
||||
constexpr Pin pin_p1_ctrl1{map_p1_ctrl1.scu_port, map_p1_ctrl1.scu_pin}; // SCU: P6_8
|
||||
constexpr GPIO p1_ctrl1{pin_p1_ctrl1, map_p1_ctrl1.gpio_port, map_p1_ctrl1.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[5]16
|
||||
|
||||
constexpr Pin pin_p1_ctrl2{map_p1_ctrl2.scu_port, map_p1_ctrl2.scu_pin}; // SCU: P6_9
|
||||
constexpr GPIO p1_ctrl2{pin_p1_ctrl2, map_p1_ctrl2.gpio_port, map_p1_ctrl2.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[3]5
|
||||
|
||||
// P2 Multiplexer control pins
|
||||
constexpr Pin pin_p2_ctrl0{map_p2_ctrl0.scu_port, map_p2_ctrl0.scu_pin}; // SCU: PE_3
|
||||
constexpr GPIO p2_ctrl0{pin_p2_ctrl0, map_p2_ctrl0.gpio_port, map_p2_ctrl0.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[7]3
|
||||
|
||||
constexpr Pin pin_p2_ctrl1{map_p2_ctrl1.scu_port, map_p2_ctrl1.scu_pin}; // SCU: PE_4
|
||||
constexpr GPIO p2_ctrl1{pin_p2_ctrl1, map_p2_ctrl1.gpio_port, map_p2_ctrl1.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[7]4
|
||||
|
||||
// Trigger pins
|
||||
constexpr Pin trigger_out_pin{map_trigger_out.scu_port, map_trigger_out.scu_pin}; // SCU: P2_6
|
||||
constexpr GPIO trigger_out{trigger_out_pin, map_trigger_out.gpio_port, map_trigger_out.gpio_pad, PAL_MODE_OUTPUT_PUSHPULL}; // GPIO[5]6
|
||||
|
||||
constexpr Pin trigger_in_pin{map_trigger_in.scu_port, map_trigger_in.scu_pin}; // SCU: PD_12
|
||||
constexpr GPIO trigger_in{trigger_in_pin, map_trigger_in.gpio_port, map_trigger_in.gpio_pad, PAL_MODE_INPUT}; // GPIO[6]26
|
||||
|
||||
// RF507x
|
||||
constexpr Pin pin_rf5072_mix_en{map_rf5072_mix_en.scu_port, map_rf5072_mix_en.scu_pin};
|
||||
constexpr GPIO rf5072_mix_en{pin_rf5072_mix_en, map_rf5072_mix_en.gpio_port, map_rf5072_mix_en.gpio_pad, 0};
|
||||
|
||||
// Anti-Aliasing filter
|
||||
constexpr Pin pin_aa_en{map_aa_en.scu_port, map_aa_en.scu_pin};
|
||||
constexpr GPIO aa_en{pin_aa_en, map_aa_en.gpio_port, map_aa_en.gpio_pad, 0};
|
||||
|
||||
} // namespace gpio_control
|
||||
#endif
|
||||
|
||||
namespace power_control {
|
||||
|
||||
void vaa_power_on(void);
|
||||
void vaa_power_off(void);
|
||||
|
||||
#ifdef PRALINE
|
||||
void aux_power_on(void);
|
||||
void aux_power_off(void);
|
||||
#endif
|
||||
|
||||
void core_power_on(void);
|
||||
void core_power_off(void);
|
||||
|
||||
static const motocon_pwm_resources_t motocon_pwm_resources = {
|
||||
.base = {.clk = &LPC_CGU->BASE_APB1_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 1)},
|
||||
.branch = {.cfg = &LPC_CCU1->CLK_APB1_MOTOCON_PWM_CFG, .stat = &LPC_CCU1->CLK_APB1_MOTOCON_PWM_STAT},
|
||||
.reset = {.output_index = 38},
|
||||
};
|
||||
|
||||
static const scu_setup_t pin_setup_vaa_enablex_pwm = {5, 0, scu_config_normal_drive_t{.mode = 1, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
static const scu_setup_t pin_setup_vaa_enablex_gpio_og = {5, 0, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
static const scu_setup_t pin_setup_vaa_enablex_gpio_r9 = {6, 10, scu_config_normal_drive_t{.mode = 0, .epd = 0, .epun = 1, .ehs = 0, .ezi = 0, .zif = 0}};
|
||||
|
||||
} // namespace power_control
|
||||
|
||||
#endif /*__GPIO_H__*/
|
||||
|
||||
@@ -41,14 +41,6 @@ constexpr GPIO gpio_led_tx = gpio[GPIO2_8];
|
||||
constexpr GPIO gpio_og_1v8_enable = gpio[GPIO3_6];
|
||||
constexpr GPIO gpio_r9_1v8_enable = gpio[GPIO2_9];
|
||||
constexpr GPIO gpio_vregmode = gpio[GPIO3_7];
|
||||
#ifdef PRALINE
|
||||
// PRALINE uses different power control pins
|
||||
constexpr GPIO gpio_og_vaa_disable = gpio[GPIO4_1]; // PRALINE VAA disable (P8_1)
|
||||
constexpr GPIO gpio_r9_vaa_disable = gpio[GPIO4_1]; // PRALINE VAA disable (P8_1)
|
||||
#else
|
||||
constexpr GPIO gpio_og_vaa_disable = gpio[GPIO2_9];
|
||||
constexpr GPIO gpio_r9_vaa_disable = gpio[GPIO3_6];
|
||||
#endif
|
||||
|
||||
constexpr GPIO gpio_rx_mix_bp = gpio[GPIO2_12];
|
||||
constexpr GPIO gpio_tx_mix_bp = gpio[GPIO2_11];
|
||||
@@ -70,7 +62,6 @@ constexpr GPIO gpio_hp = gpio[GPIO2_0];
|
||||
constexpr GPIO gpio_rx_amp = gpio[GPIO1_11];
|
||||
constexpr GPIO gpio_tx_amp = gpio[GPIO2_15];
|
||||
constexpr GPIO gpio_amp_bypass = gpio[GPIO0_14];
|
||||
constexpr GPIO gpio_not_rx_amp_pwr = gpio[GPIO1_12];
|
||||
constexpr GPIO gpio_not_tx_amp_pwr = gpio[GPIO3_5];
|
||||
|
||||
#ifdef PRALINE
|
||||
@@ -80,6 +71,7 @@ constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14]; // P5_5: LPC43xx controls
|
||||
#else
|
||||
constexpr GPIO gpio_rffc5072_select = gpio[GPIO2_13];
|
||||
constexpr GPIO gpio_rffc5072_resetx = gpio[GPIO2_14];
|
||||
constexpr GPIO gpio_not_rx_amp_pwr = gpio[GPIO1_12];
|
||||
#endif
|
||||
|
||||
#ifdef PRALINE
|
||||
@@ -128,14 +120,16 @@ constexpr GPIO gpio_q_invert = gpio[GPIO0_13];
|
||||
constexpr GPIO gpio_vaa_disable = gpio[GPIO4_1]; // VAA disable (P8_1)
|
||||
constexpr GPIO gpio_1v2_enable = gpio[GPIO4_7]; // 1V2 enable (P8_7)
|
||||
constexpr GPIO gpio_3v3aux_disable = gpio[GPIO5_15]; // 3V3 aux disable (P6_7)
|
||||
constexpr GPIO gpio_vbus_enable = gpio[GPIO8_4]; // VBUS_IN_EN P8_4 ->LOW
|
||||
constexpr GPIO gpio_vin_enable = gpio[GPIO8_5]; // VIN_IN_EN P8_5 ->HIGH
|
||||
constexpr GPIO gpio_3v3aux_oc = gpio[GPIO1_11]; // 3.3V aux overcurrent input (P2_11)
|
||||
constexpr GPIO gpio_vbus_enable = gpio[GPIO4_4]; // VBUS_IN_EN P8_4 ->LOW
|
||||
constexpr GPIO gpio_vin_enable = gpio[GPIO4_5]; // VIN_IN_EN P8_5 ->HIGH
|
||||
// PRALINE RF path control
|
||||
constexpr GPIO gpio_tx_enable = gpio[GPIO3_4]; // TX enable (P6_5)
|
||||
// constexpr GPIO gpio_mix_enable_n = gpio[GPIO3_2]; // Mixer enable inverted (P6_3)
|
||||
constexpr GPIO gpio_lpf_enable = gpio[GPIO4_8]; // LPF enable (PA_1)
|
||||
constexpr GPIO gpio_rf_amp_enable = gpio[GPIO4_9]; // RF amp enable (PA_2)
|
||||
constexpr GPIO gpio_ant_bias_disable = gpio[GPIO1_12]; // Antenna bias disable (P2_12)
|
||||
constexpr GPIO gpio_bias_oc = gpio[GPIO3_7]; // Bias tee overcurrent input (P6_11)
|
||||
|
||||
// PRALINE mixer lock detect (gpio_max2831_ld defined above at line 93)
|
||||
constexpr GPIO gpio_rffc5072_ld = gpio[GPIO6_25]; // Mixer lock detect (PD_11)
|
||||
@@ -155,6 +149,7 @@ constexpr GPIO gpio_clkin_ctrl = gpio[GPIO0_15]; // CLKIN control (P1_20)
|
||||
constexpr GPIO gpio_trigger_in = gpio[GPIO6_26]; // Trigger input (PD_12)
|
||||
constexpr GPIO gpio_trigger_out = gpio[GPIO5_6]; // Trigger output (P2_6)
|
||||
constexpr GPIO gpio_pps_out = gpio[GPIO5_5]; // PPS output (P2_5)
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef PRALINE
|
||||
|
||||
@@ -31,13 +31,13 @@ struct LED {
|
||||
|
||||
void setup() const {
|
||||
#ifdef PRALINE
|
||||
/* PRALINE LEDs are active-low (GPIO LOW = LED ON) */
|
||||
_gpio.set(); /* Start with LED OFF (HIGH) */
|
||||
// No-op: GPIO direction and initial OFF state are already
|
||||
// enforced globally at boot by pal_default_config in board.cpp.
|
||||
#else
|
||||
_gpio.clear();
|
||||
#endif
|
||||
_gpio.output();
|
||||
_gpio.configure();
|
||||
#endif
|
||||
}
|
||||
|
||||
void on() const {
|
||||
|
||||
@@ -337,8 +337,8 @@ enum GPIOs {
|
||||
GPIO4_14,
|
||||
// Power control and LED4
|
||||
GPIO4_1,
|
||||
GPIO8_4,
|
||||
GPIO8_5,
|
||||
GPIO4_4, // VBUS_IN_EN
|
||||
GPIO4_5, // VIN_IN_EN
|
||||
GPIO4_6,
|
||||
GPIO4_7,
|
||||
// RF path control
|
||||
@@ -451,8 +451,8 @@ constexpr GPIO gpio[] = {
|
||||
#ifdef PRALINE
|
||||
[GPIO4_14] = {pins[P9_2], 4, 14, 0}, // RFFC5072 mixer data
|
||||
[GPIO4_1] = {pins[P8_1], 4, 1, 0}, // VAA disable
|
||||
[GPIO8_4] = {pins[P8_4], 8, 4, 0}, // VBUS_IN_EN
|
||||
[GPIO8_5] = {pins[P8_5], 8, 5, 0}, // VIN_IN_EN
|
||||
[GPIO4_4] = {pins[P8_4], 4, 4, 0}, // VBUS_IN_EN
|
||||
[GPIO4_5] = {pins[P8_5], 4, 5, 0}, // VIN_IN_EN
|
||||
[GPIO4_6] = {pins[P8_6], 4, 6, 0}, // LED4
|
||||
[GPIO4_7] = {pins[P8_7], 4, 7, 0}, // 1V2 enable
|
||||
[GPIO4_8] = {pins[PA_1], 4, 8, 0}, // LPF enable
|
||||
@@ -470,8 +470,8 @@ constexpr GPIO gpio[] = {
|
||||
// Placeholder entries for non-PRALINE builds (use P0_0 as dummy)
|
||||
[GPIO4_14] = {pins[P0_0], 4, 14, 0},
|
||||
[GPIO4_1] = {pins[P0_0], 4, 1, 0},
|
||||
[GPIO8_4] = {pins[P0_0], 8, 4, 0},
|
||||
[GPIO8_5] = {pins[P0_0], 8, 5, 0},
|
||||
[GPIO4_4] = {pins[P0_0], 4, 4, 0},
|
||||
[GPIO4_5] = {pins[P0_0], 4, 5, 0},
|
||||
[GPIO4_6] = {pins[P0_0], 4, 6, 0},
|
||||
[GPIO4_7] = {pins[P0_0], 4, 7, 0},
|
||||
[GPIO4_8] = {pins[P0_0], 4, 8, 0},
|
||||
|
||||
Reference in New Issue
Block a user