PRALINE Tx and clock fix (Pr 3192 takeover (#3198) )

* fix clock init and add mayhem tx capacity
* aligned external clock and RX config
* fix(clock): cap TX interpolation to x16 to prevent doubled waveform speed

  The TX gateware only implements interpolation factors x1..x16 (tx_intrp
  0..4), but the rate search could select n==5 (x32) for very low TX
  sample rates. That left the AFE/CLK0/CLK1 running at the x32 rate while
  the FPGA only interpolated by x16, clocking the TX datapath at twice the
  gateware output rate. Cap afe_rate and _resampling_n to the x16 limit in
  TX so the clocks stay aligned with the interpolation setting.

* fix(praline): source PLL1 from 40MHz GP_CLKIN instead of 12MHz XTAL

  For the intermediate 90-110MHz PLL1 stepping stage, source PLL1 from
  GP_CLKIN (Si5351 CLK2/MCU_CLK at 40MHz) giving N=2, M=10, Fclk=100MHz,
  rather than the on-chip 12MHz XTAL bootstrap path. This matches the
  non-PRALINE path. Remove the dead commented-out XTAL enable/PLL code.

* docs(fpga_bridge): correct register 0x03 description for PRALINE gateware

  Register 0x03 is RX_DIGITAL_GAIN in RX and TX_NCO_CTRL in TX, not
  RX_PSTEP.

* Fix fpga_tx_set_nco_enable to use FPGA_REG3_TX_NCO_CTRL (0x03)

firmware/application/radio.cpp

@@ -390,11 +390,13 @@ void set_baseband_rate(const uint32_t rate) {
 }
 
 void set_antenna_bias(const bool on) {
-    /* Pull MOSFET gate low to turn on antenna bias. */
 #ifdef PRALINE
-    // Praline: P2_12 = GPIO1[12], ANT_BIAS_EN_N (active LOW)
-    LPC_GPIO->CLR[1] = on ? (1 << 12) : 0;
-    LPC_GPIO->SET[1] = on ? 0 : (1 << 12);
+    /* Keep bias control inside the PRALINE RF path state machine so later
+     * band/direction/amp updates don't silently force ANT_BIAS_EN_N off.
+     * Reassert output mode here because this pin is safety-critical and
+     * direct GPIO writes on an input-configured pad have no effect. */
+    gpio_ant_bias_disable.output();
+    rf_path.set_antenna_bias(on);
 #else
     if (hackrf_r9) {
         gpio_r9_not_ant_pwr.write(on ? 0 : 1);
@@ -627,4 +629,4 @@ uint32_t register_read(const size_t register_number) {
 
 } /* namespace debug */
 
-} /* namespace radio */
+} /* namespace radio */