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#3288 (#3297)

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* Refactor clock delays and improve JTAG runtest timing logic
* Refactor time calculations to use CH_FREQUENCY for consistency across modules
* Improve delay mechanism for reference oscillator startup in portapack_tcxo_enable
* comment
* increasing the time
* copilot
This commit is contained in:
Pezsma
2026-08-21 19:56:54 +02:00
committed by GitHub
parent 0840756c0e
commit 84e7f517ba
8 changed files with 69 additions and 35 deletions
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firmware/baseband/debug.cpp
+6 -3
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@@ -125,15 +125,18 @@ void update_performance_counters() {
if (performance_counter_active == 0x00)
return;
static bool last_paint_state = false;
if ((((chTimeNow() >> 10) & 0x01) == 0x01) == last_paint_state)
static systime_t last_update_time = 0;
// The MS2ST(1000) guarantees that this is exactly 1 second, regardless of the system clock setting.
if ((chTimeNow() - last_update_time) < MS2ST(1000))
return;
// Idle thread state is sometimes unuseable
if (chThdGetTicks(chSysGetIdleThread()) > 0x10000000)
return;
last_paint_state = !last_paint_state;
// Update the last update time
last_update_time = chTimeNow();
if (performance_counter_active == 0x01) {
auto utilisation = get_cpu_utilisation_in_percent();