* Refactor clock delays and improve JTAG runtest timing logic
* Refactor time calculations to use CH_FREQUENCY for consistency across modules
* Improve delay mechanism for reference oscillator startup in portapack_tcxo_enable
* comment
* increasing the time
* copilot
This commit is contained in:
Pezsma
2026-08-21 19:56:54 +02:00
committed by GitHub
parent 0840756c0e
commit 84e7f517ba
8 changed files with 69 additions and 35 deletions
+13 -13
View File
@@ -428,7 +428,7 @@ void ClockManager::portapack_tcxo_enable() {
/* Delay >10ms at 96MHz clock speed for reference oscillator to start. */
/* Delay an additional 1ms (arbitrary) for the clock generator to detect a signal. */
volatile uint32_t delay = 240000 + 24000;
volatile uint32_t delay = 2400000 + 24000;
while (delay--);
}
@@ -668,37 +668,37 @@ ClockManager::ReferenceSource ClockManager::detect_reference_source() {
}
ClockManager::Reference ClockManager::choose_reference() {
#ifdef PRALINE
const auto detected_reference = detect_reference_source();
if ((detected_reference == ReferenceSource::External) ||
(detected_reference == ReferenceSource::PortaPack)) {
const auto frequency = measure_gp_clkin_frequency();
if ((frequency >= 9850000) && (frequency <= 10150000)) {
return {detected_reference, 10000000};
}
}
#else
#ifndef PRALINE
if (hackrf_r9) {
gpio_control::r9_clkin_en.setActive();
volatile uint32_t delay = 240000 + 24000;
// Allow extra time for slower TCXOs on clone boards to stabilize before measurement
volatile uint32_t delay = 240000 + 240000;
while (delay--);
}
#endif
// Determine reference source (respects user config and Si5351 loss-of-signal)
const auto detected_reference = detect_reference_source();
// If an external or PortaPack source is detected, verify its actual frequency
if ((detected_reference == ReferenceSource::External) ||
(detected_reference == ReferenceSource::PortaPack)) {
const auto frequency = measure_gp_clkin_frequency();
// Check if the measured frequency is within the valid 10 MHz range
if ((frequency >= 9850000) && (frequency <= 10150000)) {
return {detected_reference, 10000000};
}
}
#ifndef PRALINE
if (hackrf_r9) {
// Disable r9 clock input if the 10 MHz validation failed
gpio_control::r9_clkin_en.setInactive();
}
#endif
// Fallback: Disable PortaPack TCXO and default to the HackRF 25 MHz crystal
portapack_tcxo_disable();
return {ReferenceSource::Xtal, 25000000};
}