Gpio modify v3 (#3238)

* Refactor GPIO mappings and definitions for improved clarity and functionality

- Updated SCU_ARRAY_SIZE definitions in pal_lld.h for PRALINE and non-PRALINE configurations.
- Modified pin mappings in gpio.hpp to reflect new hardware configurations, including additional control pins for RF and audio components.
- Removed obsolete GPIO definitions from hackrf_gpio.hpp and streamlined the code for better maintainability.
- Added new GPIO definitions for mix bypass, amplifier control, and other RF-related functionalities to enhance the system's capabilities.

* Refactor GPIO mappings and update SCU_ARRAY_SIZE for LPC43xx platform

- Updated SCU_ARRAY_SIZE to 80 for PRALINE configuration and 58 for others.
- Added new GPIO mappings for auxiliary power control, antenna bias, and R9 clock enable signals in gpio.hpp.
- Removed commented-out PPS output mapping in hackrf_gpio.hpp.
- Adjusted GPIO definitions for R9 clock signals to ensure proper functionality.

* Refactor RF path initialization and configuration for improved clarity and functionality

* Refactor RF path configuration and GPIO mappings for improved clarity and functionality

* Potential fix for pull request finding

* comment

* aux power polarrity

* Fix formatting of pin_aux_power_enable declaration

firmware/application/clock_manager.cpp

@@ -443,11 +443,6 @@ void ClockManager::portapack_tcxo_disable() {
 using namespace hackrf::one;
 
 void ClockManager::init_clock_generator() {
-    if (hackrf_r9) {
-        gpio_r9_mcu_clk_en.output();
-        gpio_r9_mcu_clk_en.write(1);
-    }
-
     clock_generator.reset();
     clock_generator.set_crystal_internal_load_capacitance(CrystalInternalLoadCapacitance::XTAL_CL_8pF);
     clock_generator.enable_fanout();
@@ -685,7 +680,7 @@ ClockManager::Reference ClockManager::choose_reference() {
     }
 #else
     if (hackrf_r9) {
-        gpio_r9_clkin_en.write(1);
+        gpio_control::r9_clkin_en.setActive();
         volatile uint32_t delay = 240000 + 24000;
         while (delay--);
     }
@@ -700,7 +695,7 @@ ClockManager::Reference ClockManager::choose_reference() {
     }
 
     if (hackrf_r9) {
-        gpio_r9_clkin_en.write(0);
+        gpio_control::r9_clkin_en.setInactive();
     }
 #endif
 
@@ -1187,8 +1182,7 @@ void ClockManager::enable_clock_output(bool enable) {
     }
 #else
     if (hackrf_r9) {
-        gpio_r9_clkout_en.output();
-        gpio_r9_clkout_en.write(enable);
+        gpio_control::r9_clkout_en.setState(enable);
 
         // NOTE: RETURNING HERE IF HACKRF_R9 TO PREVENT CLK2 FROM BEING DISABLED OR FREQ MODIFIED SINCE CLK2 ON R9 IS
         // USED FOR BOTH CLKOUT AND FOR THE MCU_CLOCK (== GP_CLKIN) WHICH OTHER LP43XX CLOCKS CURRENTLY RELY ON.